CN103701355A - Control system of NPC (Neutral Point Clamped) tri-level half-bridge inverter and voltage sharing control method - Google Patents

Abstract

The invention discloses a control system of an NPC (Neutral Point Clamped) tri-level half-bridge inverter and a voltage sharing control method. The control system of the NPC tri-level half-bridge inverter is characterized in that self-balancing characteristics of capacitance and voltage of the NPC tri-level half-bridge inverter are not destroyed, i.e., closed-loop control on direct current component of load current is not carried out. The voltage sharing control method disclosed by the invention comprises two control schemes: (1) a single current closed-loop voltage sharing control scheme: the single current closed-loop voltage sharing control scheme has the characteristic that a current regulator adopts a regulator responding the direct current component into 0; (2) an outer-loop voltage inner-loop current double closed-loop voltage sharing control scheme; an outer-loop voltage regulator adopts the regulator responding the direct current component into 0, and an inter-loop current regulator adopts a ratio regulator. According to the two voltage sharing control schemes, signal detection and variable feedback are not needed to be added, the system control is simplified, and the system cost is reduced.

Description

Control system and the pressure equalizing control method of neutral point clamp type tri-level half-bridge inverter

Technical field

The control system and the pressure equalizing control method that the present invention relates to a kind of neutral point clamp type tri-level half-bridge inverter, belong to converters field.

Background technology

Multi-electrical level inverter, due to advantages such as harmonic wave of output voltage content are little, is able to fast development.But level number too much will make, system cost will increase, reliability reduces and control complicated, therefore three-level inverter application is more extensive, wherein H bridge inverter is the simplest, but its limitation is larger, be not suitable for the occasions such as high input voltage and the non-isolated grid-connected inversion of single stage type, and tri-level half-bridge inverter application scenario is more extensive, and its structure and control also relatively simple.Tri-level half-bridge structure mainly contains following several: diode clamp formula, flying capacitor type and cascade three level formulas, wherein, diode clamp formula is a kind of three-level current transformer topology proposing the earliest.The input of diode clamp formula three-level semi-bridge converter is capacitances in series structure, because circuit exists non-ideal factor, there will be midpoint potential imbalance problem.Midpoint potential imbalance will make ac output voltage distortion, produces low order and even-order harmonic; Cause switching tube withstand voltage inconsistent; The cumulative effect of even-order harmonic, further aggravation mid-point voltage is uneven, finally makes system crash.Therefore, a large amount of documents about 3L-NPC half-bridge topology midpoint potential equalization problem have been there are at present.

Existing three-phase 3L-NPC inverter capacitance voltage balanced measure, mainly contains stagnant ring and controls method, Virtual Space vector method, injects residual voltage method etc., and its overall thought is under SVPWM modulation, by redundancy small vector reasonable distribution is realized to capacitor voltage equalizing.The research of single-phase 3L-NPC Pressure and Control strategy is relatively less, wherein adopts a plurality of DC source to replace input capacitance or additional firmware circuit method, will greatly increase system cost; In electric capacity both sides and the United Nations General Assembly's resistance dividing potential drop method by force, will increase circuit loss, these methods all do not tackle the problem at its root, and have destroyed the equalization characteristic of inverter circuit itself.

In addition, multi-electrical level inverter also can adopt equalizing circuit, as RLC etc., carries out that capacitance voltage is balanced to be controlled; Two 3L-NPC half-bridges are combined, form doube bridge arm 3L-NPC topology, change circuit characteristic, by additional RLC equalizing circuit, to produce the inferior harmonic current of switching frequency, realize capacitance voltage equilibrium, but this method increases circuit cost and loss.

Existing software control method mainly, by additional feedforward or feedback variable, realizes capacitor voltage equalizing.As electric capacity pressure reduction is fed forward in current reference, realizes capacitance voltage equilibrium, but need Detection capacitance voltage; Employing dicyclo is controlled, and modulating wave, by low pass filter, is got in the Voltage Reference that its DC component feeds back to inverter, also can make capacitance voltage balanced, but the memory space that this control method needs is large.

Thereby the simple low-cost control method that can realize capacitance voltage equilibrium is NPC type tri-level half-bridge inverter control field urgent problem.

Summary of the invention

Technical problem to be solved by this invention is: it (is NPC type that a kind of neutral point clamp type is provided, Neutral Point Clamped) control system and the pressure equalizing control method of tri-level half-bridge inverter, by selecting the adjuster that is 0 to the response of DC component, make the method not destroy the inherent characteristic of NPC type tri-level half-bridge inverter capacitance voltage self-balancing, the DC component of load current is not carried out to closed-loop control, solve available technology adopting other types adjuster and destroyed inverter self capacity voltage self-equilibrium characteristic, thereby cause the high problem of the complicated cost of circuit structure.

The present invention, for solving the problems of the technologies described above, adopts following technical scheme:

The control system of neutral point clamp type tri-level half-bridge inverter, described control system is single closed-loop control system, and described single closed-loop control system comprises the first adjuster, and the transfer function of described the first adjuster is 0 to the response of the DC component in its input signal.

Further, described the first adjuster resonant regulator that is as the criterion.

The control system of neutral point clamp type tri-level half-bridge inverter, described control system is double closed-loop control system, described double closed-loop control system comprises the first adjuster, the second adjuster, and the transfer function of described the first adjuster is 0 to the response of the DC component in its input signal.

Further, described the first adjuster resonant regulator that is as the criterion, described the second adjuster is proportional controller.

The pressure equalizing control method of the control system of neutral point clamp type tri-level half-bridge inverter, first, the current signal of sampling tri-level half-bridge inverter output, then the current signal of sampling and predefined reference current signal are compared, obtain error current signal, finally using this error current signal, the output signal after the first adjuster is processed is as the pulse width modulating signal of described tri-level half-bridge inverter switch operation, and described the first adjuster is 0 to the response of the DC component in its input signal.

The pressure equalizing control method of the control system of neutral point clamp type tri-level half-bridge inverter, first, voltage signal and the current signal of the output of sampling tri-level half-bridge inverter, then the voltage signal of sampling and predefined reference voltage signal are compared, obtain error voltage signal, again using this error voltage signal the output signal after the first adjuster is processed as reference current signal, and compare with the current signal of sampling, obtain error current signal, the pulse width modulating signal that finally output signal after the second adjuster is processed is moved as tri-level half-bridge inverter switch using this error current signal, wherein said the first adjuster is 0 to the response of the DC component in its input signal.

Compared with prior art, the present invention has following beneficial effect:

1, realized capacitance voltage equilibrium.

2, without additional signal, detect and variable feedback.

3, simplification system is controlled, and reduces system cost.

Accompanying drawing explanation

Fig. 1 is 3L-NPC half-bridge inverter.

Fig. 2 is 3L-NPC half-bridge inverter SPWM modulation logic figure.

Fig. 3 is basic two-port network.

Fig. 4 is 3L-NPC equivalent electric circuit.

Fig. 5 is the oscillogram of St and Sd

Fig. 6 is the spectrogram of St and Sd.

Fig. 7 is for to have under deviation and open loop condition at capacitor's capacity, capacitance voltage and output voltage waveforms.

Fig. 8 is 3L-NPC inverter list current closed-loop control block diagram.

Fig. 9 is capacitance voltage and output voltage waveforms when adopting single current closed-loop Pressure and Control of quasi-resonance adjuster.

Figure 10 is capacitance voltage and output voltage waveforms when adopting single current closed-loop Pressure and Control of pi regulator.

Figure 11 is the two closed-loop control block diagrams of 3L-NPC with self-equilibrium characteristic.

Capacitance voltage and output voltage waveforms when Figure 12 is the Pressure and Control of outer voltage current inner loop.

Figure 13 is capacitance voltage and output voltage waveforms when adopting the outer voltage current inner loop Pressure and Control of pi regulator.

The main symbol of above-mentioned accompanying drawing and label title: C1, C2---input side electric capacity; S1～S4---switching tube and corresponding driving thereof; Du, Dd---clamping diode; Lf---filter inductance; R---load resistance; Zload---load impedance; Z---brachium pontis is to the equiva lent impedance of output; Vin---input voltage; Uinv---inverter leg voltage; Iinv---inverter leg output current; Uc1, uc2---capacitor C 1, C2 voltage; Uo---load voltage; Io---load current; Ct---triangular carrier; The modulating wave of vm1---single closed loop; The modulating wave of vm2---two closed loops; Fs---triangular carrier frequency (switching frequency); Fo---frequency of modulated wave (fundamental frequency); ω s---switching angle frequency; ω o---first-harmonic angular frequency; Vd---input capacitance pressure reduction; St, Sd---equivalent drive waveforms; Iref---current reference; Uref---Voltage Reference; Kpwm---inverter equivalent gain; Kp---ratio regulates; Ve1---current error amount; Ve2---voltage error amount; Gc (s)---compensator; Kp---adjuster proportionality coefficient; Ki---adjuster integral coefficient; Kr---resonant regulator coefficient; α---resonant regulator damping coefficient; ω r---resonance angular frequency.

Embodiment

Below in conjunction with accompanying drawing, technical scheme of the present invention is elaborated:

The present invention depends on the capacitance voltage self-equilibrium characteristic of NPC type tri-level half-bridge inversion, therefore, according to above-mentioned accompanying drawing, first narrate capacitance voltage self-balancing principle, secondly the Pressure and Control thought of narration invention, finally narrates Pressure and Control scheme and specific implementation thereof.

(I) 3L-NPC half-bridge inverter capacitance voltage self-equilibrium characteristic

Respectively as shown in Figures 1 and 2, S1 and S3 drive complementary for 3L-NPC half-bridge inverter and SPWM modulation system thereof, and S2 and S4 drive complementary.Definition on off state function Si, two capacitance current difference ic and two electric capacity pressure difference Vd:

ic=ic1-ic2 (2)

Vd=uc1-uc2 (3)

If input voltage is approximate, think have ripple disable:

$\mathrm{<figure-callout\; id="1"\; label="ic"\; filenames="HDA0000440455380000015.png,HDA0000440455380000023.png"\; state="\{\{state\}\}">ic</figure-callout>}1=-\mathrm{<figure-callout\; id="2"\; label="ic"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">ic</figure-callout>}2=\frac{\mathrm{ic}}{2}---\left(4\right)$

SPWM modulation system shown in 2, take output power factor PF=1 as example with reference to the accompanying drawings, can draw 4 kinds of corresponding relations of output voltage uinv and ic and the different switch combinations of S1～S4, as shown in table 1.

Table is during 1PF=1, the corresponding relation of uinv and ic and different switch combinations

By table 1, can be obtained:

$\begin{array}{c}\mathrm{uinv}=\mathrm{<figure-callout\; id="1"\; label="uc"\; filenames="HDA0000440455380000015.png,HDA0000440455380000023.png"\; state="\{\{state\}\}">uc</figure-callout>}1\&CenterDot;(\mathrm{<figure-callout\; id="1"\; label="S"\; filenames="HDA0000440455380000015.png,HDA0000440455380000023.png"\; state="\{\{state\}\}">S</figure-callout>}1\&CenterDot;S2)-\mathrm{<figure-callout\; id="2"\; label="uc"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">uc</figure-callout>}2\&CenterDot;(\mathrm{<figure-callout\; id="3"\; label="S"\; filenames="HDA0000440455380000012.png"\; state="\{\{state\}\}">S</figure-callout>}3\&CenterDot;S4)\\ \mathrm{ic}=-\mathrm{iinv}\&CenterDot;[(\mathrm{<figure-callout\; id="1"\; label="S"\; filenames="HDA0000440455380000015.png,HDA0000440455380000023.png"\; state="\{\{state\}\}">S</figure-callout>}1\&CenterDot;S2)+(\mathrm{<figure-callout\; id="3"\; label="S"\; filenames="HDA0000440455380000012.png"\; state="\{\{state\}\}">S</figure-callout>}3\&CenterDot;S4)]\end{array}---\left(5\right)$

Further:

$\begin{array}{c}\mathrm{uinv}=\frac{\mathrm{<figure-callout\; id="2"\; label="Viv"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">Viv</figure-callout>}}{2}\&CenterDot;\mathrm{St}+\frac{\mathrm{<figure-callout\; id="2"\; label="Vd"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">Vd</figure-callout>}}{2}\&CenterDot;\mathrm{Sd}\\ \mathrm{ic}=-\mathrm{iinv}\&CenterDot;\mathrm{Sd}\end{array}---\left(6\right)$

Wherein,

$\begin{array}{c}\mathrm{St}=(\mathrm{<figure-callout\; id="1"\; label="S"\; filenames="HDA0000440455380000015.png,HDA0000440455380000023.png"\; state="\{\{state\}\}">S</figure-callout>}1\&CenterDot;S2)-(\mathrm{<figure-callout\; id="3"\; label="S"\; filenames="HDA0000440455380000012.png"\; state="\{\{state\}\}">S</figure-callout>}3\&CenterDot;S4)\\ \mathrm{Sd}=(\mathrm{<figure-callout\; id="1"\; label="S"\; filenames="HDA0000440455380000015.png,HDA0000440455380000023.png"\; state="\{\{state\}\}">S</figure-callout>}1\&CenterDot;S2)+(\mathrm{<figure-callout\; id="3"\; label="S"\; filenames="HDA0000440455380000012.png"\; state="\{\{state\}\}">S</figure-callout>}3\&CenterDot;S4)\end{array}---\left(7\right)$

Basic two-port network as shown in Figure 3 of definition, can make the equivalent electric circuit of 3L-NPC half-bridge topology, as shown in Figure 4 according to formula (6) and formula (7).

According to the expression formula of St in formula (7) and Sd, can make waveform and the spectrogram thereof of St and Sd, as shown in accompanying drawing 5 and accompanying drawing 6, St is odd harmonic function respectively, only contains the sinusoidal quantity of odd; Sd is even hamonic function, the cosine amount that contains DC component and even.Take N=fs/fo(even number) be example, St and Sd are carried out to fourier decomposition and obtain:

$\mathrm{St}\left(t\right)=\underset{n=\mathrm{1,3,5},...}{\overset{\&infin;}{\mathrm{\&Sigma;}}}\mathrm{St}\_0n\&CenterDot;\sin (n\&CenterDot;\mathrm{\&omega;o}\&CenterDot;t)+\underset{x=\mathrm{1,2,3},...}{\overset{\&infin;}{\mathrm{\&Sigma;}}}(\underset{y=\&PlusMinus;1,\&PlusMinus;3,\&PlusMinus;5,...}{\overset{\&infin;}{\mathrm{\&Sigma;}}}\mathrm{St}\_\mathrm{xy}\&CenterDot;\sin (x\&CenterDot;\mathrm{\&omega;s}\&CenterDot;t+y\&CenterDot;\mathrm{\&omega;o}\&CenterDot;t))---\left(8\right)$

$\mathrm{Sd}\left(t\right)=\mathrm{Sd}\_\mathrm{dc}+\underset{n=\mathrm{2,4,6},...}{\overset{\&infin;}{\mathrm{\&Sigma;}}}\mathrm{Sd}\_0n\&CenterDot;\cos (n\&CenterDot;\mathrm{\&omega;o}\&CenterDot;t)+\underset{x=\mathrm{1,2,3},...}{\overset{\&infin;}{\mathrm{\&Sigma;}}}(\underset{y=\&PlusMinus;0,\&PlusMinus;2,\&PlusMinus;4,...}{\overset{\&infin;}{\mathrm{\&Sigma;}}}\mathrm{St}\_\mathrm{xy}\&CenterDot;\sin (x\&CenterDot;\mathrm{\&omega;s}\&CenterDot;t+y\&CenterDot;\mathrm{\&omega;o}\&CenterDot;t))---\left(9\right)$

By accompanying drawing 4, can be obtained:

$\mathrm{iinv}\left(t\right)=\frac{\mathrm{Vin}}{2}\&CenterDot;\frac{\mathrm{St}}{Z}+\frac{\mathrm{<figure-callout\; id="2"\; label="Vd"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">Vd</figure-callout>}}{2}\&CenterDot;\frac{\mathrm{Sd}}{Z}---\left(10\right)$

From formula (6), 3L-NPC brachium pontis output voltage uinv can regard as by two parts voltage and form: output voltage uinv_b=VinSt/2 when 1. capacitance voltage is balanced; 2. the output voltage uinv_d=VdSd/2 that the unbalanced pressure reduction Vd of capacitance voltage causes.Analyze respectively Vd=0 and Vd ≠ 0 o'clock below, the characteristic of capacitance current difference ic and mean value ic (avg) thereof.

(1)Vd=0

Vd=0 is midpoint potential balance.Now, output current is denoted as io_b (t), and its expression formula is:

Wherein,

From formula (11), can find out, in output current, only contain odd sinusoidal quantity harmonic wave, and Sd contain DC component and even cosine amount harmonic wave, thus:

$\mathrm{ic}\left(\mathrm{avg}\right)=-\mathrm{fo}\&CenterDot;{\&Integral;}_0^{1/\mathrm{fo}}\mathrm{iinv}\_b\left(t\right)\&CenterDot;\mathrm{Sd}\left(t\right)\mathrm{dt}=0---\left(12\right)$

From formula (12) and formula (4), ic1 (avg)=ic2 (avg)=0, once this capacitance voltage that shows 3L-NPC is balanced, on electric capacity just can there is not DC component in electric current, this and load characteristic have nothing to do, whether even exist deviation also irrelevant with capacitance, capacitance voltage will be stabilized in Vin/2.

(2)Vd≠0

Vd ≠ 0 is that capacitance voltage is unbalanced.Now, output current is denoted as iinv_nb (t), and its expression formula is:

Wherein,

This electric current is comprised of two parts, iinv_b (t) and iinv_db (t), and iinv_db (t) contains DC component, and its size is:

$\mathrm{iinv}\_\mathrm{nb}\left(\mathrm{avg}\right)=\frac{\mathrm{Sd}\_\mathrm{<figure-callout\; id="2"\; label="dc"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">dc</figure-callout>}}{2\&CenterDot;\left|Z\left(0\right)\right|}\&CenterDot;\mathrm{Vd}---\left(14\right)$

From formula (12), iinv_b (t) can not produce DC component in capacitance current, and therefore, if capacitance voltage is unbalanced, capacitance current mean value is:

Known according to formula (15) and formula (4):

(a) when

be that load impedance is perception, capacitive or pure when resistive, have

z (0) ≠ 0, certainly will there is DC component in capacitance current, and ic (avg) is reverse with Vd.Also just have: work as Vd>0, while being uc1>uc2, ic (avg) <0, ic1 (avg) <0, ic2 (avg) >0, capacitor C 1 will be discharged, and capacitor C 2 will be charged, until the two electric voltage equalization; When Vd<0, in like manner;

(b) when be that load is pure when perception, have

z (0)=0, ic (avg) → ∞, can realize fast uniform;

(c) when

be load while being pure capacitive, have

z (0)=∞, ic (avg) → 0, will lose self-equilibrium characteristic.Luckily, under actual conditions, the loading condition of pure capacitive does not exist, because electric capacity and circuit etc. have certain impedance;

(d) electric capacity pressure reduction Vd is larger, and more hour, ic (avg) is larger for impedance angle, and the self-balancing speed of 3L-NPC is just faster;

(e) because current i inv (t) before filtering contains DC component, the higher harmonic components in the common main filtering electric current of filter,

On not impact of DC component, so in load current io (t), also contain DC component io_nb (avg), its size is:

$\mathrm{Io}\_\mathrm{nb}\left(\mathrm{avg}\right)=\mathrm{Iinv}\_\mathrm{nb}\left(\mathrm{avg}\right)=\frac{\mathrm{Sd}\_\mathrm{<figure-callout\; id="2"\; label="dc"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">dc</figure-callout>}}{2\left|Z\left(0\right)\right|}\&CenterDot;\mathrm{Vd}---\left(16\right)$

The DC component of load current io (t) and the proportional relation of electric capacity pressure reduction Vd;

(f) frequency spectrum of Sd is known in 6 with reference to the accompanying drawings, and Sd_dc and Sd_10 (fs place) are larger, and the Z (ω s) at general fs place is larger, and formula (16) is approximately:

$\mathrm{Ic}\left(\mathrm{avg}\right)\_\mathrm{nb}\&ap;-\frac{\mathrm{<figure-callout\; id="2"\; label="Vd"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">Vd</figure-callout>}}{2}\&CenterDot;\frac{{\mathrm{Sd}\_\mathrm{<figure-callout\; id="2"\; label="dc"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">dc</figure-callout>}}^2}{\left|Z\left(0\right)\right|}=-\mathrm{Sd}\_\mathrm{dc}\&CenterDot;\mathrm{Iinv}\_\mathrm{nb}\left(\mathrm{avg}\right)=-\mathrm{Sd}\_\mathrm{dc}\&CenterDot;\mathrm{Io}\_\mathrm{nb}\left(\mathrm{avg}\right)---\left(17\right)$

Unbalanced at capacitance voltage, the average current of electric capacity brachium pontis mid point outflow current i c (t) mainly comes from the DC component of output current io (t).

To sum up, when 3L-NPC capacitance voltage is unbalanced, in load current, produce and electric capacity pressure reduction DC component and part even-order harmonic component in the same way, now in capacitance current, certainly will there is the direct current reverse with pressure difference, this electric current will be eliminated electric capacity pressure reduction, therefore 3L-NPC half-bridge topology has capacitance voltage self-equilibrium characteristic, and its self-balancing electric current depends primarily on DC component in load current.

(II) NPC type tri-level half-bridge inverter Pressure and Control strategy

Pressure and Control thought of the present invention depends on 3L-NPC capacitance voltage self-equilibrium characteristic, it is characterized in that: do not destroy 3L-NPC capacitance voltage self-equilibrium characteristic, the DC component of load current is not carried out to closed-loop control.

(III) NPC type tri-level half-bridge inverter Pressure and Control scheme and implementation thereof

Below in conjunction with accompanying drawing, illustrate that 3L-NPC half-bridge inverter has single closed loop that self-equilibrium characteristic and the present invention provide and the Pressure and Control scheme of two closed loops.Take single-phase 3L-NPC half-bridge inverter and filter thereof as single L shaped formula be example, its circuit structure as shown in Figure 1, technical parameter is: DC input voitage 800V, output voltage effective value 220V/50Hz, input capacitance C1=1800 μ F, C2=2300 μ F, filter inductance Lf is 5.6mH, switching frequency 15kHz, load resistance R=17 Ω.

Under above-mentioned technical parameter, accompanying drawing 7 has provided the waveform of 3L-NPC capacitance voltage and output voltage when capacitance exists deviation and operate in open loop state.Accompanying drawing 6 shows, when capacitor's capacity exists deviation, electric capacity initial voltage value uc1 is 450V, and uc2 is 350, under inverter operate in open loop state, uc1 reduces, and uc2 increases, until uc1=uc2, capacitance voltage is balanced, and keeps this equilibrium state work, so 3L-NPC has capacitance voltage self-equilibrium characteristic.

(1) while adopting the closed-loop control of electric current list, as shown in Figure 8, first, the current signal of sampling tri-level half-bridge inverter output, then the current signal of sampling and predefined reference current signal are compared, obtain error current signal, finally using this error current signal, the output signal after the first adjuster is processed is as the pulse width modulating signal of described tri-level half-bridge inverter switch operation, and described the first adjuster is 0 to the response of the DC component in its input signal.In addition, because the grid type application such as reactive power compensation, active power filtering, rectification are with the similitude of controlling under inversion mode of operation, single current closed-loop Pressure and Control scheme of the present invention also can be widely used.

The adjuster transfer function that is 0 to DC component response has multiple, only take quasi-resonance adjuster as example, and its transfer function G1 (s) is:

$G1\left(s\right)=\frac{\mathrm{Kr}\&CenterDot;s}{{\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+\mathrm{\&alpha;}\&CenterDot;s+{\mathrm{\&omega;r}}^2}---\left(18\right)$

Now, the open-loop transfer function T (s) of single current closed-loop is:

$T\left(s\right)=\frac{\mathrm{Kr}\&CenterDot;s}{{\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+\mathrm{\&alpha;}\&CenterDot;s+{\mathrm{\&omega;<figure-callout\; id="2"\; label="r"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">r</figure-callout>}}^2}\&CenterDot;\frac{\mathrm{Kpwm}}{s\&CenterDot;\mathrm{Lf}+R}---\left(19\right)$

In order to obtain good load current tracking effect, ω r is designed at first-harmonic angular frequency o place, and Kr is enough large, thereby obtains higher first-harmonic gain.But Kr is excessive, can affect the stability margin of system, so Kr need compromise and chooses.

Provide the Kr=30000 in the control parameter of the Pressure and Control scheme of one group of list current closed-loop: G1 (s) below, α=6, ω r=ω o=2 π * 50Hz.Now, the waveform of capacitance voltage and output voltage as shown in Figure 9, as can be seen from the figure, when capacitor's capacity has deviation, electric capacity initial voltage value uc1 is 450V, uc2 is 350, is adopting under single closed-loop control of quasi-resonance adjuster, and uc1 reduces, uc2 increases, until uc1=uc2, capacitance voltage is balanced, and keeps this equilibrium state work.This shows, adopting the adjuster that is 0 to the response of DC component, is under single closed-loop control of the first adjuster, can realize capacitance voltage equilibrium, compare with existing single-phase 3L-NPC pressure equalizing control method, without input and supplementary variable feedback, simplification system is controlled, and reduces system cost.

Conventional closed-loop control adjuster adopts PI or PR adjuster conventionally, and its transfer function is respectively:

$\mathrm{Gpi}\left(s\right)=\mathrm{Kp}+\frac{\mathrm{Ki}}{s}---\left(20\right)$

$\mathrm{Gpr}\left(s\right)=\mathrm{Kp}+\frac{\mathrm{Kr}\&CenterDot;s}{{\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+\mathrm{\&alpha;}\&CenterDot;s+{\mathrm{\&omega;r}}^2}---\left(21\right)$

From formula (19) and formula (20), can find out Gpi (0) ≠ 0, Gpr (0) ≠ 0.If while adopting single current closed-loop to control, G1 (s) selects Gpi (s) or Gpr (s), cannot realize capacitance voltage equilibrium.G1 (the s)=Gpi (s) of take is example, gets Kp=12, Ki=10000, now the waveform of capacitance voltage and output voltage as shown in Figure 10, as can be seen from the figure,, when capacitor's capacity has deviation, electric capacity initial voltage value uc1 is 450V, uc2 is 350, adopting under single closed-loop control of pi regulator, uc1 increases, and uc2 reduces, electric capacity pressure reduction constantly aggravates, and causes the most at last system crash.This shows, adopting the adjuster that is not 0 to the response of DC component, is under single closed-loop control of the first adjuster, by destroying the self-equilibrium characteristic of 3L-NPC, makes capacitance voltage unbalanced, causes the most at last system crash.Therefore,, while adopting conventional single closed-loop control, certainly will need to add other measures and carry out the balanced control of capacitance voltage.The existing Pressure and Control scheme for single-phase 3L-NPC half-bridge inverter is mainly adopting on the basis of the adjusters such as PI or PR, additional firmware circuit, or add electric capacity pressure reduction feedfoward control, or by modulating wave DC component feedfoward control etc., these Pressure and Control schemes, need additional detected signal, increase system is controlled complexity and cost, and 3L-NPC inverter list closed loop Pressure and Control scheme of the present invention has overcome the problems referred to above.

(2) adopt two closed-loop controls of outer voltage current inner loop, as shown in Figure 11, first, voltage signal and the current signal of the output of sampling tri-level half-bridge inverter, then the voltage signal of sampling and predefined reference voltage signal are compared, obtain error voltage signal, again using this error voltage signal the output signal after the first adjuster is processed as reference current signal, and compare with the current signal of sampling, obtain error current signal, the pulse width modulating signal that finally output signal after the second adjuster is processed is moved as tri-level half-bridge inverter switch using this error current signal.Wherein said the first adjuster is 0 to the response of the DC component of its input signal; The second adjuster is selected proportional controller.

While adopting the Pressure and Control of two closed loops, require G1 (s) for be 0 to DC component adjuster, G2 (s)=Kp.G1 (s) be take and selected quasi-resonance adjuster as example, that is:

$G1\left(s\right)=\frac{\mathrm{Kr}\&CenterDot;s}{{\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="HDA0000440455380000012.png,HDA0000440455380000014.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+\mathrm{\&alpha;}\&CenterDot;s+{\mathrm{\&omega;r}}^2}---\left(22\right)$

G2(s)=Kp (23)

Now, the open-loop transfer function Ti (s) of current inner loop and closed loop transfer function, Gi (s) are respectively:

$\mathrm{Ti}\left(s\right)=G2\left(s\right)\&CenterDot;\frac{\mathrm{Kpwm}}{s\&CenterDot;\mathrm{Lf}+R}---\left(24\right)$

$\mathrm{Gi}\left(s\right)=\frac{\mathrm{Ti}\left(s\right)}{1+\mathrm{Ti}\left(s\right)}---\left(25\right)$

The open-loop transfer function Tv (s) that can obtain outer voltage according to the closed loop transfer function, Gi (s) of current inner loop is:

Tv(s)=G1(s)·Gi(s)·R (26)

Provide the control parameter of the Pressure and Control scheme of one group of two closed loop below: the Kr=1000 in G1 (s), α=6, ω r=ω o=2 π * 50Hz, the Kp=2 in G2 (s).Now, the waveform of capacitance voltage and output voltage as shown in Figure 12, as can be seen from the figure, when capacitor's capacity has deviation, electric capacity initial voltage value uc1 is 450V, uc2 is 350, adopting quasi-resonance adjuster, is that under two closed-loop controls of the first adjuster, uc1 reduces, uc2 increases, until uc1=uc2, capacitance voltage is balanced, and keeps this equilibrium state work.This shows, adopting the adjuster that is 0 to the response of DC component, be under two closed-loop controls of the first adjuster, this Pressure and Control scheme can realize capacitance voltage equilibrium, compare with existing single-phase 3L-NPC pressure equalizing control method, without input and supplementary variable feedback, simplification system is controlled, and reduces system cost.

Being similar to single closed-loop control, is not 0 adjuster if G1 (s) adopts to DC component response, as PI or PR adjuster etc., can make equally capacitance voltage unbalanced.G1 (the s)=Gpi (s) of take is example, gets Kp=2, Ki=800, now the waveform of capacitance voltage and output voltage as shown in Figure 13, as can be seen from the figure,, when capacitor's capacity has deviation, electric capacity initial voltage value uc1 is 450V, uc2 is 350, at pi regulator, be under two closed-loop controls of the first adjuster, uc1 increases, and uc2 reduces, electric capacity pressure reduction constantly aggravates, and causes the most at last system crash.This shows, adopting the adjuster that is not 0 to the response of DC component, is under two closed-loop controls of the first adjuster, and the self-equilibrium characteristic by destruction 3L-NPC, makes capacitance voltage unbalanced, causes the most at last system crash.Therefore, if adopt conventional Double closed-loop of voltage and current, certainly will need to take other measures to carry out the balanced control of capacitance voltage, can increase system control complexity and cost, and the two closed loop Pressure and Control schemes of 3L-NPC inverter of the present invention overcome the problems referred to above.

(3) because filter does not affect the DC component in load current, therefore, filter form does not affect the capacitance voltage self-equilibrium characteristic of 3L-NPC half-bridge inverter, thereby method of the present invention can be widely used in adopting the neutral point clamp type tri-level half-bridge inverter of various forms filter.

To sum up, Pressure and Control scheme of the present invention is a kind of simply, cheaply and easily pressure equalizing control method of design.

Above embodiment is only explanation technological thought of the present invention; can not limit protection scope of the present invention with this; every technological thought proposing according to the present invention; any change of doing on technical scheme basis (concrete form that comprises the first adjuster and the second adjuster), within all falling into protection range of the present invention.

Claims (6)

1. the control system of neutral point clamp type tri-level half-bridge inverter, described control system is single closed-loop control system, described single closed-loop control system comprises the first adjuster, it is characterized in that: the transfer function of described the first adjuster is 0 to the response of the DC component in its input signal.

2. the control system of neutral point clamp type tri-level half-bridge inverter according to claim 1, is characterized in that: described the first adjuster resonant regulator that is as the criterion.

3. the control system of neutral point clamp type tri-level half-bridge inverter, described control system is double closed-loop control system, described double closed-loop control system comprises the first adjuster, the second adjuster, it is characterized in that: the transfer function of described the first adjuster is 0 to the response of the DC component in its input signal.

4. the control system of neutral point clamp type tri-level half-bridge inverter according to claim 3, is characterized in that: described the first adjuster resonant regulator that is as the criterion, described the second adjuster is proportional controller.

5. the pressure equalizing control method based on the control system of neutral point clamp type tri-level half-bridge inverter described in claim 1, it is characterized in that: first, the current signal of sampling tri-level half-bridge inverter output, then the current signal of sampling and predefined reference current signal are compared, obtain error current signal, finally using this error current signal, the output signal after the first adjuster is processed is as the pulse width modulating signal of described tri-level half-bridge inverter switch operation, and described the first adjuster is 0 to the response of the DC component in its input signal.

6. the pressure equalizing control method based on the control system of neutral point clamp type tri-level half-bridge inverter described in claim 3, it is characterized in that: first, voltage signal and the current signal of the output of sampling tri-level half-bridge inverter, then the voltage signal of sampling and predefined reference voltage signal are compared, obtain error voltage signal, again using this error voltage signal the output signal after the first adjuster is processed as reference current signal, and compare with the current signal of sampling, obtain error current signal, the pulse width modulating signal that finally output signal after the second adjuster is processed is moved as tri-level half-bridge inverter switch using this error current signal, wherein said the first adjuster is 0 to the response of the DC component in its input signal.

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