CN103516199A

CN103516199A - Method for controlling power supply conversion device and related circuit thereof

Info

Publication number: CN103516199A
Application number: CN201210202570.XA
Authority: CN
Inventors: 谢俊禹
Original assignee: Novatek Microelectronics Corp
Current assignee: Novatek Microelectronics Corp
Priority date: 2012-06-19
Filing date: 2012-06-19
Publication date: 2014-01-15

Abstract

The invention discloses a method for controlling a power supply conversion device. The power supply conversion device comprises an inductor, a first switch, a second switch, a third switch and a fourth switch. The first switch is coupled between an input terminal and the first terminal of the inductor; the second switch is coupled between an earth terminal and the second terminal of the inductor; the third switch is coupled between the earth terminal and the first terminal of the inductor; and the fourth switch is coupled between the second terminal of the inductor and an output terminal. The method comprises: generating a pulse width modulation signal based on an output voltage of the output terminal, a current of the first switch and a ramp voltage; and controlling the turning-on sequences of the first switch, the second switch, the third switch and the fourth switch based on the pulse width modulation signal and a clock signal.

Description

Control method and the interlock circuit thereof of power supply change-over device

Technical field

The present invention relates to a kind of method and interlock circuit thereof of controlling power supply change-over device, relate in particular to a kind of method and interlock circuit thereof of controlling power supply change-over device with peak-current mode.

Background technology

DC-DC converter (DC/DC converter) is conventional electric pressure converter in electronic installation now, and it can a DC input voitage (voltage providing as battery) be provided the VD of a varying level.In general, the kind of DC-DC converter can be divided into boost type (Boost), buck (Buck) and step-down/up type (Buck-Boost).Because battery is when providing electric power, and revocable voltage, therefore in order to extend the service time of portable electronic product, adopt step-down/up type DC-DC converter can effectively promote battery life.

Please refer to Fig. 1, Fig. 1 is the schematic diagram of a known buck DC-DC converter 10.As shown in Figure 1, buck DC-DC converter 10 comprises an inductance L and switch S A～SD.Buck DC-DC converter 10 is by the conducting order of control signal CONA～COND control switch SA～SD, so that an input voltage VIN of an input IN is converted to an output voltage VO UT, and export output voltage VO UT to an output OUT, to provide an output current IO UT to output OUT.Specifically,, within a clock cycle, the operation of buck DC-DC converter 10 is divided into a charge cycle and a discharge cycle.In charge cycle, buck DC-DC converter 10, by adjusting control signal CONA～COND, makes switch S A, SB conducting, and switch S C, SD disconnect, and input voltage VIN starts inductance L to charge.When energy in inductance L is enough, buck DC-DC converter 10, by adjusting control signal CONA～COND, allows switch SA, SB disconnect, switch S C, SD conducting, and then the energy that makes to be stored in inductance L is released into output OUT, take and maintain output voltage VO UT as certain value.By the shared time scale of charge cycle and discharge cycle in the adjustment clock cycle, buck DC-DC converter 10 is operable in boost mode (Boost mode) or decompression mode (Buck mode).When supposing charge cycle shared time scale being a ratio D within the clock cycle, and discharge cycle shared time scale within the clock cycle is a ratio (1-D), when ratio D is between 0.5 and 0 (0.5≤D≤0), buck DC-DC converter 10 operates in decompression mode; And when ratio D is between 1 and 0.5 when (1≤D≤0.5), buck DC-DC converter 10 operates in boost mode.And the relation of voltage VL1, the VL2 of inductance L two-end-point can be expressed as:

\frac{VL 2}{VL 1} = \frac{D}{1 - D} - - - (1)

And the relation of inductive current IL and output current IO UT can be expressed as:

IL = \frac{IOUT}{1 - D} - - - (2)

When buck DC-DC converter 10 enters stable state, the average voltage of inductance L two-end-point will equate (VL1=VL2).By formula (1), formula (2), can be learnt, inductive current IL can be the twice of output current IO UT, and it is higher that (Conducting Loss) damaged in the now conducting of buck DC-DC converter 10.In comparison, when voltage VL1 equals voltage VL2, by switch S A, SD conducting, switch S B, SC disconnect, making inductive current IL equal output current IO UT(is that output voltage V IN directly provides energy to output OUT), can effectively reduce the conducting of buck DC-DC converter 10 and damage.

Therefore, when buck DC-DC converter 10 operates in decompression mode, if switch S B continues to disconnect, switch S D continues conducting, and while only completing voltage transitions by diverter switch SA, SC, the conducting that also can reduce inductive current IL and then reduce buck DC-DC converter 10 is damaged.In like manner, when buck DC-DC converter 10 operates in boost mode, if switch S A continues conducting, switch S C continues to disconnect, and while only completing voltage transitions by diverter switch SB, SD, the conducting that also can reduce inductive current IL and then reduce buck DC-DC converter 10 is damaged.

In addition, owing to being connected to the switching over number of times of inductance L two-end-point, reduce (only diverter switch SA, SC or switch S B, SD), the switching of buck DC-DC converter 10 is damaged (Switching Loss) and can effectively be reduced, and the electric charge (Gate charge/discharge) that discharges and recharges of switch gate also reduces thereupon, and then effectively promotes the conversion efficiency of buck DC-DC converter 10.

Therefore, how to allow buck DC-DC converter 10 that switch S A and the common ON time of switch S D are maximized, and the switching times of switch S A～SD is minimized, so that the conducting of buck DC-DC converter 10 is damaged, drop to minimumly with switching to damage, just become industry and desire most ardently the target reaching.

Summary of the invention

The invention provides a kind of method and interlock circuit thereof of controlling power supply change-over device with peak-current mode, to reduce the average power consumption of power supply change-over device.

The present invention discloses a kind of method that is used for controlling a power supply change-over device, this power supply change-over device comprises an inductance, one first switch, a second switch, one the 3rd switch and one the 4th switch, this first switch is coupled between an input and a first end of an inductance, this second switch is coupled between one second end and a ground end of this inductance, the 3rd switch is coupled between this first end and this ground end of this inductance, and the 4th switch is coupled between this second end and an output of this inductance.The method comprises the output voltage according to this output, a switching current and a ramp voltage of this first switch, produces a pulse width modulating signal; And according to this pulse width modulating signal and a clock signal, control this first switch, this second switch, the 3rd switch and the 4th switch.

The present invention separately discloses a kind of feedback control circuit, for a power supply change-over device, this power supply change-over device comprises an inductance, one first switch, a second switch, one the 3rd switch, one the 4th switch, this feedback control circuit comprises a pulse width modulation module, comprise a partial pressure unit, be coupled in this output, be used for, according to an output voltage of this power supply change-over device, exporting a feedback voltage; One error amplifier, is coupled in this partial pressure unit, is used for, according to this feedback voltage and one first reference voltage, producing an error voltage; One current sense unit, is used for detecting a switching current of this first switch; One slope-compensation unit, is used for, according to a slope-compensation control signal, producing a ramp voltage; One adder unit, is coupled in this current sense unit and this slope-compensation unit, is used for, according to this switching current and this ramp voltage, producing one second reference voltage; And a comparing unit, be coupled in this error amplifier and this adder unit, be used for, according to this error voltage and this second reference voltage, producing a pulse width modulating signal; One clock generation module, is used for producing a clock signal; An and Logic control module, be used for according to this clock signal and this pulse width modulating signal, produce this slope-compensation control signal, and produce one first control signal, one second control signal, one the 3rd control signal and one the 4th control signal, to control respectively this first switch, this second switch, the 3rd switch and the 4th switch.

The present invention separately discloses a kind of power supply change-over device.This power supply change-over device comprises an inductance; One first switch, is coupled between a first end of an input and this inductance, is used for, according to one first control signal, controlling the conducting situation between this output and this first end; One second switch, is coupled between one second end and a ground end of this inductance, is used for according to one second control signal, controls the conducting situation between this second end and this ground end; One the 3rd switch, is coupled between this first end and this ground end of this inductance, is used for according to one the 3rd control signal, controls the conducting situation between this first end and this ground end; One the 4th switch, is coupled between this second end and an output of this inductance, is used for, according to one the 4th control signal, controlling the conducting situation between this second end and an output; An and feedback control circuit, be used for according to a switching current of an output voltage of this output, this first switch, export this first control signal, this second control signal, the 3rd control signal and the 4th control signal, to control the conducting order of this first switch, this second switch, the 3rd switch and the 4th switch.

Accompanying drawing explanation

Fig. 1 is the schematic diagram of known step-down/up type power supply change-over device.

Fig. 2 is the schematic diagram of the embodiment of the present invention one power supply change-over device.

Fig. 3 A～3D is the schematic diagram of the coherent signal while operating under different conditions of the power supply change-over device shown in Fig. 2.

Fig. 4 A is the schematic diagram of an implementation of the current sense unit of the power supply change-over device shown in Fig. 2.

Fig. 4 B is the schematic diagram of an implementation of the Logic control module of the power supply change-over device shown in Fig. 2.

Fig. 5 is the schematic diagram of the status mechanism of the Logic control module realization shown in Fig. 4 B.

Fig. 6 is the schematic diagram of another power supply change-over device of the embodiment of the present invention.

Fig. 7 A is the schematic diagram of another power supply change-over device of the embodiment of the present invention.

Fig. 7 B is the schematic diagram of a current sensing unit in the power supply change-over device shown in Fig. 7 A.

Fig. 8 is the schematic diagram of another implementation of Logic control module shown in Fig. 2.

Fig. 9 A is the schematic diagram of a method of the embodiment of the present invention.

Fig. 9 B is the schematic diagram of an implementation of the method shown in Fig. 9 A.

Wherein, description of reference numerals is as follows:

10 buck DC-DC converters

20,60,70 power supply change-over devices

200 feedback control circuits

202 pulse width modulation modules

204 clock generating modules

206 Logic control modules

208 partial pressure unit

210 error amplifiers

212 current sense unit

214 slope-compensation unit

216 adder units

218 comparing units

400 inverters

402,404 switches

406 inductive reactances

408, OP1 amplifier

410,412, M1 transistor

414 control signal generation units

416 compensating signal generation units

90 methods

900～904,904A, 904B, 904C step

AND1～AND3 and door

CBUCK, CBST, PUL1, PUL2 signal

AND1_O～AND3_O、SR1_O、SR2_O

CLK clock signal

CLK_1～CLK_3 clock cycle

CONA～COND control signal

CS1, CS2 current source

D ratio

DFF1～DFF4 D type flip-flop

D_CRAMP slope-compensation control signal

IN input

INV1～INV3 inverter

IL inductive current

IOUT output current

ISA current signal

L inductance

OP1 amplifier

OR1 or door

OUT output

PD1, PD2 pre-driver

PG1～PG3 pulse generator

PWM pulse width modulating signal

R1, R2 resistance

Rsense inductive reactance

SA～SD switch

SR1, SR2 SR latch unit

T1～T5 time point

VEA error voltage

VIN input voltage

VL1, VL2 voltage

VOUT output voltage

VRAMP ramp voltage

VREF1, VREF2 reference voltage

Embodiment

Please refer to Fig. 2, the schematic diagram of the power supply change-over device 20 that Fig. 2 is the embodiment of the present invention.Power supply change-over device 20 is used for an input voltage VIN to be converted to an output voltage VO UT, so that output voltage VO UT is maintained to a target voltage.As shown in Figure 2, power supply change-over device 20 comprises an inductance L, switch S A～SD and a feedback control circuit 200.In the operating principle of inductance L and switch S A～SD and Fig. 1, inductance L and switch S A～SD are roughly the same, therefore continue to use identical element numbers.Feedback control circuit 200 comprises a pulse width modulation module 202, a clock generation module 204 and a Logic control module 206.Feedback control circuit 200 is for detecting switching current and the output voltage VO UT of the switch S A that flows through, to export control signal CONA～COND, and the conducting of control switch SA～SD order.By feedback control circuit 200, power supply change-over device 20 can extend the time of switch S A and switch S D common conducting in operation, reduces the conducting of power supply change-over device 20 and damages.In addition, feedback control circuit 200 also can minimize the switching times of switch S A～SD in operation, to reduce the switching of power supply change-over device 20, damages.In brief, by feedback control circuit 200, power supply change-over device 20 can effectively reduce power consumption, and increases conversion efficiency.

Particularly, please continue to refer to Fig. 2, pulse width modulation module 202 comprises a partial pressure unit 208, an error amplifier 210, a current sense unit 212, a slope-compensation unit 214, an adder unit 216 and a comparing unit 218.Partial pressure unit 208 is coupled in output OUT, is used for producing a feedback voltage VFB who is directly proportional to output voltage according to output voltage VO UT.Error amplifier 210 is coupled in partial pressure unit 208, is used for, according to feedback voltage VFB and a reference voltage VREF1, producing an error voltage VEA.Current sense unit 212 is used for the switching current of detection switch SA, to produce a current signal ISA.Slope-compensation unit 214 is used for, according to a slope-compensation control signal D_CRAMP, producing a ramp voltage VRAMP, and its purposes is for avoiding output voltage VO UT unstable.Adder unit 216 is coupled in current sense unit 212 and slope-compensation unit 214, is used for, according to current signal ISA and ramp voltage VRAMP, producing a reference voltage VREF2.Comparing unit 218 is used for, according to error voltage VEA and reference voltage VREF2, producing a pulse width modulating signal PWM.Thus, it is whether inductance L stores enough energy and provide to output OUT that pulse width modulation module 202 can indicate reference voltage VREF2 whether to surpass error voltage VEA(in pulse width modulating signal PWM).

Clock generating module 204 is for producing a clock signal clk, to indicate the beginning of each clock cycle.Clock generating module 204 can be as phase-locked loop (Phase Locked Loop) clock generator, delay-locked loop (Delay Locked Loop) clock generator isochronon generator or as passive components such as quartz (controlled) oscillators and is realized, but not subject to the limits.Logic control module 206 is used for producing control signal CONA～COND and slope-compensation control signal D_CRAMP, it can be when clock signal clk indicates a clock cycle to start, adjust control signal CONA～COND and compensating control signal D_CRAMP, and then make power supply change-over device 20 enter charge cycle.Logic control module 206 separately can be when pulse width modulating signal PWM indication reference voltage VREF2 surpasses error voltage VEA, adjust control signal CONA～COND and compensating control signal D_CRAMP, make the 20 complete charge cycles of power supply change-over device, and start discharge cycle.Thus, feedback control circuit 200 can pass through switching current and the output voltage VO UT of detection switch SA, effectively extends the time of switch S A and switch S D common conducting in operation, and minimizes the switching times of switch S A～SD.

Specifically, when power supply change-over device 20 comes into operation, Logic control module 206 can be when a clock cycle, CLK_1 starts, and default control signal CONA～COND disconnects switch S A, SD conducting and switch S B, SC.According to the magnitude relationship of input voltage VIN and output voltage VO UT, Logic control module 206 can be adjusted control signal CONA～COND and compensating control signal D_CRAMP according to this, and then control power supply change-over device 20 operates in decompression mode (buck mode), buck pattern (buck-boost mode) or boost mode (boost mode).

If when the clock cycle, CLK_1 started, input voltage VIN is greater than output voltage VO UT, input voltage VIN is except offering output OUT energy, also can energy be stored in inductance L fast, causing inductive current IL(is the switching current of switch S A) fast rise, thus reference voltage VREF2 is increased fast.Therefore, current signal ISA adds that slope compensation VRAMP(is reference voltage VREF2) can in clock cycle CLK_1, surpass error voltage VEA.Now, Logic control module 206 can be when receiving indicator current signal ISA and add that slope compensation VRAMP surpasses the pulse width modulating signal PWM of error voltage VEA, by adjusting control signal CONA～COND, switch S C, SD conducting and switch S A, SB are disconnected, and inductance L starts the energy of storage to be released into output OUT.Finally, Logic control module 206 can be when clock signal clk indicates that next clock cycle, CLK_2 started, by adjusting control signal CONA～COND, switch S C, SD conducting and switch S A, SB are disconnected, and stopping that inductance L releases energy to output OUT(is that power supply change-over device 20 is got back to preset state).Thus, by repeating aforesaid operations, power supply change-over device 20 will operate at decompression mode.It should be noted that Logic control module 206 continues actuating switch SD and only diverter switch SA, SC, can make power supply change-over device 20 runnings at decompression mode.Accordingly, power supply change-over device 20 switchings of running when decompression mode are damaged and can effectively be reduced.

On the other hand, if when the clock cycle, CLK_1 started, input voltage VIN is slightly larger than output voltage VO UT, though input voltage VIN can provide energy to output OUT, storage power is to inductance L rapidly, and now inductive current IL is by rising.Therefore, current signal ISA adds that slope compensation VRAMP cannot surpass error voltage VEA in clock cycle CLK_1.Logic control module 206 can be when clock signal clk indicates that next clock cycle, CLK_2 started, adjust control signal CONA～COND, switch S A, SB conducting and switch S C, SD are disconnected, thereby expand the pressure reduction at inductance L two ends, make inductive current IL fast rise.In the case, current signal ISA adds that slope compensation VRAMP can surpass error voltage VEA in clock cycle CLK_2.Logic control module 206 can be when pulse width modulating signal PWM indicator current signal ISA adds that slope compensation VRAMP surpasses error voltage VEA again, by adjusting control signal CONA～COND, switch S A, SD conducting and switch S B, SC are disconnected, and input voltage VIN directly provides energy to output OUT.In addition, because input voltage VIN is slightly larger than output voltage VO UT, inductive current IL will continue rising, and current signal ISA adds that slope compensation VRAMP will again surpass error voltage VEA in clock cycle CLK_2.Logic control module 206 can be at pulse width modulating signal PWM again during transition, when indication reference voltage VREF2 surpasses error voltage VEA, by adjusting control signal CONA～COND, switch S C, SD conducting and switch S A, SB are disconnected, and inductance L starts the energy just now storing to be released into output OUT.Finally, Logic control module 206 can be when clock signal clk indicates that next clock cycle, CLK_3 started, by adjusting control signal CONA～COND, switch S A, SD conducting and switch S B, SC are disconnected, and stopping that inductance L releases energy to output OUT(is that power supply change-over device 20 is got back to preset state).Thus, by repeating aforesaid operations, power supply change-over device 20 will operate in buck pattern.It should be noted that Logic control module 206 is when operating in buck pattern, can effectively extend the time of switch S A and the common conducting of switch S D, and then the conversion efficiency of power supply change-over device 20 is damaged and promoted in the conducting of reduction power supply change-over device 20.In addition,, by extending switch S A and the common ON time of switch S D, power supply change-over device 20 will be more smooth and easy in the operation of switching buck pattern, contribute to reduce the shake (ripple) of output voltage VO UT.

Next, if when the clock cycle, CLK_1 started, input voltage VIN is slightly less than output voltage VO UT, and operation workflow when the operation workflow of logic control circuit 206 is slightly larger than output voltage VO UT to input voltage VIN is similar.Only different, because input voltage VIN is slightly less than output voltage VO UT, so when switch S A, SD conducting and switch S B, SC disconnect, inductive current IL slow decreasing.In the case, pulse width modulating signal PWM twice indicator current signal ISA in clock cycle CLK2 adds that slope compensation VRAMP can postpone over the time of error voltage VEA backward.In brief, Logic control module 206 still can effectively extend the time of switch S A and the common conducting of switch S D, and then the conversion efficiency of power supply change-over device 20 is damaged and promoted in the conducting of reduction power supply change-over device 20.Meanwhile, by switch S A and the common conducting of switch S D, power supply change-over device 20 is more smooth and easy in the operation of switching buck pattern, can effectively reduce the shake of output voltage VO UT.

Finally, if when the clock cycle, CLK_1 started, input voltage VIN is less than output voltage VO UT, input voltage VIN cannot storage power to inductance L, the energy of output OUT is to be provided by inductance L, now inductive current IL is by fast-descending.Logic control module 206 can be when clock signal clk indicates that next clock cycle, CLK_2 started, adjust control signal CONA～COND, switch S A, SB conducting and switch S C, SD are disconnected, thereby expand the pressure reduction at inductance L two ends, make inductive current IL fast rise.Thus, reference voltage VREF2 can surpass error voltage VEA in clock cycle CLK_2.Logic control module 206 can be when pulse width modulating signal PWM indicator current signal ISA adds that slope compensation VRAMP surpasses error voltage VEA, by adjusting control signal CONA～COND, switch S A, SD conducting and switch S B, SC are disconnected, and inductance L starts to export energy to output OUT.Under this situation, because input voltage VIN is less than output voltage VO UT, inductive current IL is by fast-descending, so current signal ISA adds that slope compensation VRAMP will can again not surpass error voltage VEA in clock cycle CLK_2.Finally, Logic control module 206 can, when clock signal clk indicates that next clock cycle, CLK_3 started, by adjusting control signal CONA～COND, disconnect switch S A, SB conducting and switch S C, SD.Subsequently, the operation of clock cycle CLK_2 will repeat to occur, and power supply change-over device 20 runnings are in boost mode.It should be noted that Logic control module 206 continues actuating switch SA and only diverter switch SB, SD, can make power supply change-over device 20 runnings at boost mode.Accordingly, power supply change-over device 20 switchings of running when decompression mode are damaged and can effectively be reduced.

From the above, by switching current and the output voltage VO UT of detection switch SA, feedback control circuit 200 can produce suitable control signal CONA～COND, the conducting order of control switch SA～SD, to maximize the time of switch S A and the common conducting of switch S D and the switching times that minimizes switch S A～SD.

In order to be described in more detail the detailed operation of power supply change-over device 20, please refer to the 3A～3D figure, the 3A～3D figure is the schematic diagram of the coherent signal while operating under different operating states of the power supply change-over device 20 shown in Fig. 2.First, Fig. 3 A is the schematic diagram of the power supply change-over device 20 runnings coherent signal when decompression mode shown in Fig. 2.As shown in Figure 3A, at time point T1, clock signal clk take that a pulse telltable clock cycle CLK_1 starts and pulse width modulating signal PWM is low logic level, and control signal CONA, COND are high logic level, and control signal CONB, CONC are low logic level.Switch S A, SD conducting, switch S B, SC disconnect, and then make input voltage VIN provide energy to output OUT, and storage power is to inductance L.On the other hand, slope-compensation control signal D_CRAMP is high logic level at time point T1, makes ramp voltage VRAMP be increased with fixed slope by ground terminal potential.Because input voltage VIN is greater than output voltage VO UT, inductive current IL meeting fast rise, reference voltage VREF2 will surpass error voltage VEA by time point T2 in clock cycle CLK_1.When pulse width modulating signal PWM surpasses error voltage VEA with a pulse indication reference voltage VREF2, control signal CONA, CONC are switched.Switch S C, SD conducting, switch S A, SB disconnect, and inductance L starts the energy just now storing to be discharged into output OUT.Under this situation, because switch S A disconnects, current signal ISA will be reset to 0, and slope-compensation control signal D_CRAMP can be switched to low logic level, and ramp voltage VRAMP is reset and maintains ground terminal potential.Subsequently, clock signal clk be take a pulse at time point T3 and is indicated next clock cycle CLK_2 to start and pulse width modulating signal PWM is low logic level, and control signal CONA, CONC are switched.Accordingly, switch S A, SD conducting, switch S B, SC disconnect, and power supply change-over device 20 returns back to preset state.On the other hand, slope-compensation control signal D_CRAMP is also switched to high logic level at time point T3, and ramp voltage VRAMP starts to be risen with fixed slope by ground terminal potential.Put T1 to the operation of time point T3 by the repetition time, power supply change-over device 20 will operate in high efficiency decompression mode.In other words, power supply change-over device 20 only needs diverter switch SA and switch S C within a clock cycle, can realize high efficiency decompression mode.Thus, by minimizing the switching times of switch S A and switch S C, power supply change-over device 20 average power consumption can effectively be reduced.

Please refer to Fig. 3 B, Fig. 3 B is when input voltage VIN is slightly larger than output voltage VO UT, the schematic diagram of coherent signal when the power supply change-over device 20 shown in Fig. 2 operates.At time point T1, clock signal clk take that a pulse telltable clock cycle CLK_1 starts and pulse width modulating signal PWM during as low logic level, and control signal CONA, COND are high logic level, and control signal CONB, CONC are low logic level.Switch S A, SD conducting, switch S B, SC disconnect, and then make input voltage VIN provide energy to output OUT, and storage power is to inductance L.On the other hand, slope-compensation control signal D_CRAMP is high logic level at time point T1, makes ramp voltage VRAMP be increased with fixed slope by ground terminal potential.Because input voltage VIN is only slightly larger than output voltage VO UT, inductive current IL rising, current signal ISA adds that the signal of slope compensation VRAMP surpasses error voltage VEA in the clock cycle at this moment.Therefore, when clock signal clk take that a pulse telltable clock cycle CLK_2 starts and pulse width modulating signal PWM during as low logic level at time point T2, control signal CONB, COND can be switched, switch S A, SB conducting and switch S C, SD are disconnected, and the speed that inductive current IL rises is enhanced.In the case, current signal ISA adds that the signal of slope compensation VRAMP can be at time point T3 overrun error voltage VEA, and pulse width modulating signal PWM produces a pulse, and control signal CONB, COND are switched.Accordingly, switch S A, SD conducting, switch S B, SC disconnect.On the other hand, slope-compensation control signal D_CRAMP can produce a pulse, to reset ramp voltage VRAMP to ground terminal potential and to rise with fixed slope.Now, input voltage VIN is slightly larger than output voltage VO UT, and inductive current IL continues slow rising.Current signal ISA add slope compensation VRAMP still can be in clock cycle CLK_2 time point T4 overrun error voltage VEA again.Pulse width modulating signal PWM produces a pulse, represents that current signal ISA adds the signal overrun error voltage VEA of slope compensation VRAMP.Control signal CONA, CONC are switched.Accordingly, switch S C, SD conducting, switch S A, SB disconnect, and inductance L exports the energy of storage to output OUT.In addition the D_CRAMP of slope-compensation control signal, is switched to reset and maintains ramp voltage VRAMP to ground terminal potential.Finally, at time point T5, when clock signal clk telltable clock cycle CLK_3 starts and pulse width modulating signal PWM is low logic level, control signal CONA, CONC and slope-compensation control signal D_CRAMP are switched.Accordingly, switch S A, SD conducting, switch S B, SC disconnect, and ramp voltage VRAMP is risen with fixed slope by ground terminal potential.Put T1 to the operation of time point T5 by the repetition time, power supply change-over device 20 will operate in buck pattern.From the above, when power supply change-over device 20 operates in buck pattern, power supply change-over device 20 can effectively extend the time of switch S A and the common conducting of switch S D, damages and promote the efficiency of power supply change-over device 20 to reduce conducting.In addition, power supply change-over device 20 also utilizes switch S A and the common conducting of switch S D to make the operation of power supply change-over device 20 in buck pattern more smooth and easy, can effectively reduce the shake of output voltage VO UT.

Next, please refer to Fig. 3 C, Fig. 3 C is input voltage VIN while being slightly less than output voltage VO UT, the schematic diagram of the coherent signal of power supply change-over device 20 runnings shown in Fig. 2.As shown in Figure 3 C, when input voltage VIN is slightly less than output voltage VO UT, the operation of power supply change-over device 20 will be similar to the situation of Fig. 3 B.Different, because input voltage VIN is slightly less than output voltage VO UT, so time point T3, the T4 of Fig. 3 C will delay compared with time point T3, the T4 of Fig. 3 B.Thus, when input voltage VIN is slightly less than output voltage VO UT, power supply change-over device 20 also can effectively extend the common ON time of switch S A and switch S D, damages and promote the conversion efficiency of power supply change-over device 20 to reduce conducting.

When input voltage VIN continuous decrease, power supply change-over device 20 will operate in boost mode.Please refer to Fig. 3 D, Fig. 3 D is the schematic diagram of power supply change-over device 20 coherent signal while operating in boost mode.At time point T1, when clock signal clk telltable clock cycle CLK_1 starts and pulse width modulating signal PWM is low logic level, control signal CONA, CONB are high logic level, control signal CONC, COND are low logic level, switch S A, SB conducting, switch S C, SD disconnect, and inductive current IL starts to rise.At time point T2, current signal ISA adds slope compensation VRAMP overrun error voltage VEA, and pulse width modulating signal PWM produces a pulse, and control signal CONB, COND are switched, thereby switch S A, SD conducting and switch S B, SC are disconnected.Meanwhile, Logic control module 206 the tuned slope compensating control signal D_CRAMP, to allow ramp voltage VRAMP reset to ground terminal potential and to rise with a fixed slope.Now, because input voltage VIN is less than output voltage VO UT, inductive current IL is by fast-descending.Therefore current signal ISA adds that slope compensation VRAMP will can be at same clock cycle overrun error voltage VEA.Subsequently, at time point T3, clock signal clk telltable clock cycle CLK_2 starts, and control signal CONB, COND are switched.Switch S A, SB conducting, switch S C, SD disconnect, and inductive current IL starts to increase.Next power supply change-over device 20 will repeat in Fig. 3 D time point T1 to the operation of time point T3, to operate in boost mode.Should be noted, power supply change-over device 20 only needs diverter switch SB and switch S D within a clock cycle, can realize boost mode.In other words, by minimizing the switching times of switch S B and switch S D, power supply change-over device 20 average power consumption can effectively be reduced.

Should be noted, power supply change-over device 20 shown in Fig. 2 is embodiments of the invention, it is to represent concept of the present invention in function square mode, and the implementation of each square or the form of coherent signal, producing method etc. can suitably be adjusted according to various system requirements.For instance, please refer to 4A, 4B figure, 4A, 4B figure are respectively the schematic diagram of an implementation of current sense unit 212 andlogic control modules 206 in Fig. 2.As shown in Figure 4 A, current sense unit 212 comprises an inverter 400, switch 402,404, an inductive reactance 406, an amplifier 408 and transistor 410,412.In current sense unit 212, the relation that couples of each assembly as shown in Figure 4 A.The How It Works of the current sense unit 212 shown in Fig. 4 A should be well known to those skilled in the art, and for the sake of clarity, is not repeated herein.Please continue to refer to Fig. 4 B, Logic control module 206 comprises a control signal generation unit 414 and a compensating signal generation unit 416.Control signal generation unit 414 is used for producing according to pulse width modulating signal PWM and clock signal clk and produces control signal CONA～COND.Compensating signal generation unit 416 is used for according to control signal CONA and pulse width modulating signal PWM, produces slope-compensation control signal D_CRAMP.

Particularly, control signal generation unit 414 comprise an inverter INV1, pulse generator PG1, PG2, D type flip-flop DFF1, DFF2, with door AND1, an AND2, SR type latch unit SR1, SR2 and pre-driver PD1, PD2.The relation that couples in control signal generation unit 414 between each assembly as shown in Figure 4.Inverter INV1 is used for according to control signal CONB, produces an inversion signal CONB_I.Pulse generator PG1 is used for according to signal CBST, produces a pulse signal PUL1.Pulse generator PG2 is used for according to signal CBUCK, produces a pulse signal PUL2.D type flip-flop DFF1 is used for, according to pulse width modulating signal PWM, inversion signal CONB_I and pulse signal PUL1, producing a signal CBUCK.D type flip-flop DFF2 is used for, according to clock signal clk, control signal CONA and pulse signal PUL2, producing a signal CBST.Be used for receiving signal CBUCK and pulse width modulating signal PWM with door AND1, and produce according to this signal AND1_O.Be used for receiving signal CBST and clock signal clk with door AND2, and produce according to this signal AND2_O.SR type latch unit SR1 is used for according to signal AND1_O and clock signal clk, produces a signal SR1_O.SR type latch unit SR2 is used for, according to signal AND2_O and pulse width modulating signal PWM, producing a signal SR2_O.Pre-driver PD1 is used for according to signal SR1_O, produces control signal CONA, CONC.Pre-driver PD2 is used for according to signal SR2_O, produces control signal CONB, COND.Preferably, pre-driver PD1, PD2 can will produce suitable control signal CONA～COND, to avoid switch S A and switch S C or switch S B and switch S D conducting simultaneously.

On the other hand, compensating signal generation unit 416 comprise an inverter INV2, a pulse generator PG3, one and door AND3 and one or door OR1.The relation that couples in control signal generation unit 402 between each assembly as shown in Figure 4.Inverter INV2 is used for according to control signal CONA, produces an inversion signal CONAI.Pulse generator PG3, according to pulse width modulating signal PWM, produces a pulse signal PUL3.Be used for according to the signal CBST in pulse signal PUL3 and control signal generation unit 414 with door AND3, produce signal AND3_O.Or a door OR1 is used for according to inversion signal CONA_I and signal AND3_O, produce slope-compensation control signal D_CRAMP.Thus, by control signal generation unit 414 and compensating signal generation unit 416, Logic control module 206 can produce suitable control signal CONA～COND and slope-compensation control signal D_CRAMP, with according to the conducting order of different mode of operation control switch SA～SD.About the How It Works of control signal generation unit 414 and compensating signal generation unit 416, details are as follows.

When control signal CONA, CONB are low logic level, and when control signal CONC, COND are high logic level, (switch S A, SB disconnect, switch S C, SD conducting), signal BST, PUL1 and signal PUL2 can be low logic level, signal BUCK is high logic level.Now, when if occur in clock signal clk, a rising edge (rising edge) indicates a clock cycle to start, signal CBST still maintains low logic level, and signal PUL1 can be adjusted to high logic level, and then control signal CONA, CONC are switched, with actuating switch SA and cut-off switch SC.Next, when if again occur in clock signal clk, a rising edge indicates next clock cycle to start, signal CBST, PUL2 can be switched, and then control signal CONB, COND are switched, with actuating switch SB, and cut-off switch SD.In addition, when signal CBST switches, pulse generator PG1 can produce a pulse to D type flip-flop DFF1, with reset signal CBUCK to low logic level, and then guarantee that control signal CONA is continuously high logic level (switch S A continues conducting), and guarantee that when control signal CONB, CONC are different be high logic level (conducting when switch S B is different from switch S C).

Next, when control signal CONA～CONB is high logic level, when control signal CONC, COND are low logic level (switch S A, SB conducting, switch S C, SD disconnect), signal BST, PUL1 and signal PUL2 can be high logic level, and signal BUCK is low logic level.Now, if produce a rising edge in pulse width modulating signal PWM, signal CBUCK maintains low logic level, and signal PUL2 is reset to low logic level, and then control signal CONB, COND are switched, with cut-off switch SB, and actuating switch SD.Next, if again there is a rising edge in pulse width modulating signal PWM, signal CBUCK, PUL1 can be switched, and then control signal CONA, CONC are switched, with cut-off switch SA, actuating switch SC.In addition, when signal CBUCK switches, pulse generator PG2 can produce a pulse to D type flip-flop DFF2, with reset signal CBST, to low logic level, and then guarantees that control signal COND is continuously high logic level (switch S D continues conducting).

Please refer to Fig. 5, Fig. 5 is the schematic diagram of the performed status mechanism of control signal generation unit 414.As shown in Figure 5, when switch S A, SB disconnect, when switch S C, SD conducting, if produce a rising edge in clock signal clk, control signal generation unit 414 can produce suitable control signal CONA～COND, switch S B, SC is disconnected, switch S A, SD conducting.When switch S B, SC disconnect, when switch S A, SD conducting, if produce a rising edge in clock signal clk, control signal generation unit 414 can produce suitable control signal CONA～COND, switch S C, SD is disconnected, switch S A, SB conducting; Otherwise if there is a rising edge in pulse width modulating signal PWM, control signal generation unit 414 can produce suitable control signal CONA～COND disconnects switch S A, SB, switch S C, SD conducting.When switch S A, SB disconnect, when switch S C, SD conducting, if there is a rising edge in pulse width modulating signal PWM, control signal generation unit 414 can produce suitable control signal CONA～COND, switch S B, SC is disconnected, switch S A, SD conducting.Thus, control signal generation unit 414 can be avoided diverter switch SA～SD simultaneously, and then reduces to switch and damage.

It should be noted that, one of main spirits of the present invention is to utilize switching current and the output voltage VO UT of detection switch SA, the conducting order of control switch SA～SD, the time of switch S A and the common conducting of switch S D while operating in buck pattern significantly to extend power supply change-over device 20, and then the conducting that effectively reduces power supply change-over device 20 is damaged.In addition, the conducting order configuring by the present invention, power supply change-over device 20 can not occur to be disconnected and the state of switch S C, SD conducting by switch S A, SB, jumps directly to the state that switch S A, SB conducting and switch S C, SD disconnect, thereby avoids output voltage VO UT unstable.What is more, when power supply change-over device 20 operates in boost mode or decompression mode, the switching times of switch S A～SD is also minimized, and then reduces the switching damage of power supply change-over device 20.According to different application, those skilled in the art can implement suitable adjustment or variation according to this.For instance, please refer to Fig. 6, the schematic diagram of the power supply change-over device 60 that Fig. 6 is the embodiment of the present invention.The framework of power supply change-over device 60 is similar to the framework of power supply change-over device 20, therefore continues to use identical element numbers.Different from power supply change-over device 20, in power supply change-over device 60, switch S C and switch S D realize with passive component (being diode).The detailed operating process of power supply change-over device 60 can, with reference to above-mentioned power supply change-over device 20, for the sake of clarity, be not repeated herein.

In addition, the mode of the switching current of detection switch SA also can be realized by other method.For instance, please refer to Fig. 7 A, the schematic diagram of the power supply change-over device 70 that Fig. 7 A is the embodiment of the present invention.The framework of power supply change-over device 70 is similar to the framework of power supply change-over device 20, therefore continues to use identical element numbers.Be filled to 20 differently from power supply conversion, the newly-increased sensing resistor Rsense of power supply change-over device 70, between switch S A and input voltage VIN, and is revised as power supply sensing unit 210 current sensing unit 700 according to this.Please refer to Fig. 7 B, Fig. 7 B is the schematic diagram of current sensing unit 700 in power supply change-over device 70.Current sensing unit 700 comprises resistance R 1, R2, current source CS1, CS2, an amplifier OP1 and a transistor M1.In current sensing unit 700, each inter-module couples relation as shown in Figure 7 B, and the operation principle of current sensing unit 700 should be well known to those skilled in the art, and for the sake of clarity, is not repeated herein.Thus, the power supply method for sensing that power supply change-over device 70 can be different, obtains the information of the switching current of switch S A.

On the other hand, the control signal generation unit 414 shown in the 4th figure also can be realized by alternate manner.For instance, please refer to Fig. 8, Fig. 8 is the schematic diagram of control signal generation unit 414 another implementations.As shown in Figure 8, control signal generation unit 414 comprise inverter INV1～INV3, pulse generator PG1, PG2, D type flip-flop DFF1～DFF4, with door AND1 and pre-driver PD1, PD2.The relation that couples in control signal generation unit 414 between each assembly as shown in Figure 8.The operation workflow of the control signal generation unit 414 shown in Fig. 8 can, with reference to the control signal generation unit 414 shown in the 4th figure, for the sake of clarity, be not repeated herein.

In addition, according to the operation workflow of feedback control circuit 200, can be summarized as one for controlling the method 90 of power supply change-over device 20.Please refer to Fig. 9 A, the schematic diagram of the method 90 that Fig. 9 A is the embodiment of the present invention.Method 90 comprises:

Step 900: start.

Step 902: according to the switching current IMAX of the output voltage VO UT of output OUT, switch S A and ramp voltage VRAMP, produce pulse width modulating signal PWM.

Step 904: according to pulse width modulating signal PWM and clock signal clk, control switch SA～SD.

According to method 90, power supply change-over device 20 can pass through switching current IMAX and the output voltage OUT of detection switch SA, the conducting of suitable control switch SA～SD according to this sequentially, and then effectively extend the time of switch S A and the common conducting of switch S D in operation, and minimize the switching times of switch S A～SD.Accordingly, the average power consumption of power supply change-over device 20 can effectively be reduced.

Specifically, first, by output voltage VO UT dividing potential drop, to produce feedback voltage VFB, and after feedback voltage VFB and reference voltage VREF are subtracted each other, produce error voltage VEA.On the other hand, according to the switching current IMAX of switch S A, can produce a current signal ISA who is proportional to switching current IMAX.Current signal ISA and ramp voltage VRAMP are added, and with generation current signal, ISA adds slope compensation VRAMP, it is characterized in that ramp voltage VRAMP is ground terminal potential when switch S A disconnects; Separately when switch S A conducting and switch S B, SD alternate conduction, with a certain slope, rise.Thus, pulse width modulating signal PWM can add that the magnitude relationship of slope compensation VRAMP and error voltage VEA produces by comparing current signal ISA.Pulse width modulating signal PWM is for representing whether inductance L stores enough energy and offer output OUT.

After obtaining pulse width modulating signal PWM and clock signal clk, can be according to the conducting order of pulse width modulating signal PWM and clock signal clk control switch SA～SD.For instance, please refer to Fig. 9 B, Fig. 9 B is the schematic diagram of an execution mode of the step 904 of the method 90 shown in Fig. 9 A.As shown in Figure 9 B, step 904 comprises:

Step 904A: cut-off switch SA, SB, actuating switch SC, SD, and when clock signal clk indicates a clock cycle to start, execution step 904B.

Step 904B: cut-off switch SB, SC, actuating switch SA, SD, and when clock signal clk indicates a clock cycle to start, execution step 904C; And when pulse width modulating signal PWM indication inductance L stores enough energy, execution step 904A.

Step 904C: cut-off switch SC, SD, actuating switch SA, SB, and when pulse width modulating signal PWM indication inductance L stores enough energy, execution step 904B.

Preferably, when power supply change-over device 20 entry into service, power supply change-over device 20 preset state are cut-off switch SB, SC, actuating switch SA, SD(step 904B).Thus, the common ON time of switch S A and switch S D can effectively be extended, and the switching times of switch S A～SD can be minimized, and then reduces the average power consumption of power supply change-over device 20.

In sum, the disclosed method of above-described embodiment and interlock circuit can pass through peak-current mode (Peak current mode), control according to this switching sequence of power supply change-over device.Compared to known technology, above-described embodiment need to not realized the average current that measures inductance with complicated circuit.In addition, according to the time sequencing of the disclosed diverter switch of above-described embodiment, power supply change-over device can be in buck pattern diverter switch swimmingly, and then the conducting that reduces power supply change-over device is damaged and is damaged with switching.In brief, adopt the method disclosed in the present and interlock circuit, can effectively reduce the average power consumption of power supply change-over device.

The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims

1. a method that is used for controlling a power supply change-over device, this power supply change-over device comprises an inductance, one first switch, a second switch, one the 3rd switch and one the 4th switch, this first switch is coupled between an input and a first end of an inductance, this second switch is coupled between one second end and a ground end of this inductance, the 3rd switch is coupled between this first end and this ground end of this inductance, the 4th switch is coupled between this second end and an output of this inductance, and the method comprises:

According to a switching current of an output voltage of this output, this first switch and a ramp voltage, produce a pulse width modulating signal; And

According to this pulse width modulating signal and a clock signal, control this first switch, this second switch, the 3rd switch and the 4th switch.

2. the method for claim 1, is characterized in that this ramp voltage is a ground terminal potential when this first switch disconnects.

3. the method for claim 1, it is characterized in that when this first switch conduction and this second switch and the 4th switch alternate conduction, this ramp voltage can be reset to a ground terminal potential and with a certain slope when pulse width modulating signal indicates this error voltage to be less than this second reference voltage to be increased.

4. the method for claim 1, is characterized in that this,, according to this switching current value and this ramp voltage of an output voltage of this output, this first switch, produces the step of a pulse width modulating signal, comprising:

According to this output voltage, produce a feedback voltage

According to this feedback voltage and one first reference voltage, produce an error voltage;

Detect this switching current, to obtain a current/voltage;

This current/voltage and this ramp voltage are added, to obtain one second reference voltage; And

Relatively this error voltage and this second reference voltage, to produce this pulse width modulating signal.

5. method as claimed in claim 4, is characterized in that according to this pulse width modulating signal and a clock signal, controls the step of this first switch, this second switch, the 3rd switch and the 4th switch, comprising:

At this first switch, the 4th switch conduction, this second switch, the 3rd switch disconnect, and when this clock signal output one clock cycle of indication starts and this this error voltage of pulse width modulating signal output indication is greater than this second reference voltage, this first switch of conducting, this second switch, and disconnect the 3rd switch, the 4th switch.

6. method as claimed in claim 4, is characterized in that according to this pulse width modulating signal and a clock signal, controls the step of this first switch, this second switch, the 3rd switch and the 4th switch, comprising:

At this first switch, the 4th switch conduction, this second switch, the 3rd switch disconnect, and when this pulse width modulating signal indicates this error voltage to be less than this second reference voltage, conducting the 3rd switch, the 4th switch, and disconnect this first switch, this second switch.

7. method as claimed in claim 4, is characterized in that according to this pulse width modulating signal and a clock signal, controls the step of this first switch, this second switch, the 3rd switch and the 4th switch, comprising:

In this first switch, this second switch conducting, the 3rd switch, the 4th switch disconnect, and when this pulse width modulating signal indicates this error voltage to be less than this second reference voltage, this first switch of conducting, the 4th switch, and disconnect this second switch, the 3rd switch.

8. method as claimed in claim 4, is characterized in that according to this pulse width modulating signal and a clock signal, controls the step of this first switch, this second switch, the 3rd switch and the 4th switch, comprising:

At the 3rd switch, the 4th switch conduction, this first switch, this second switch disconnect, and when this pulse width modulating signal indicates this error voltage to be less than this second reference voltage, this first switch of conducting, the 4th switch, and disconnect this second switch, the 3rd switch.

9. a feedback control circuit, for a power supply change-over device, this power supply change-over device comprises an inductance, one first switch, a second switch, one the 3rd switch, one the 4th switch, this feedback control circuit comprises:

One pulse width modulation module, comprising:

One partial pressure unit, is coupled in this output, is used for, according to an output voltage of this power supply change-over device, exporting a feedback voltage;

One error amplifier, is coupled in this partial pressure unit, is used for, according to this feedback voltage and one first reference voltage, producing an error voltage;

One current sense unit, is used for detecting a switching current of this first switch;

One slope-compensation unit, is used for, according to a slope-compensation control signal, producing a ramp voltage;

One adder unit, is coupled in this current sense unit and this slope-compensation unit, is used for, according to this switching current and this ramp voltage, producing one second reference voltage; And

One comparing unit, is coupled in this error amplifier and this adder unit, is used for, according to this error voltage and this second reference voltage, producing a pulse width modulating signal;

One clock generation module, is used for producing a clock signal; And

One Logic control module, be used for according to this clock signal and this pulse width modulating signal, produce this slope-compensation control signal, and produce one first control signal, one second control signal, one the 3rd control signal and one the 4th control signal, to control respectively this first switch, this second switch, the 3rd switch and the 4th switch.

10. feedback control circuit as claimed in claim 9, is characterized in that this Logic control module is adjusted this slope-compensation control signal, makes this ramp voltage equal a ground terminal potential when this first switch disconnects.

11. feedback control circuits as claimed in claim 9, it is characterized in that when this first switch conduction and this second switch and the 4th switch alternate conduction, when this Logic control module indicates this error voltage to be less than this second reference voltage at this pulse width modulating signal, adjust this slope-compensation control signal, make this ramp voltage reset to a ground terminal potential and increase with a fixed slope.

12. feedback control circuits as claimed in claim 9, it is characterized in that when this first switch conduction, this second switch disconnects, the 3rd switch disconnects, the 4th switch conduction, this clock signal output one clock cycle of indication starts, and when this this error voltage of pulse width modulating signal output indication is greater than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch keeping conducting, this second switch transfers conducting to, the 3rd switch keeping disconnects, and the 4th switch transfer disconnection to.

13. power supply change-over devices as claimed in claim 9, it is characterized in that when this first switch conduction, this second switch disconnects, the 3rd switch disconnects, the 4th switch conduction, and when this this error voltage of pulse width modulating signal output indication is less than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch transfer disconnection to, this second switch maintains disconnection, the 3rd switch transfers conducting to, and the 4th switch keeping conducting.

14. power supply change-over devices as claimed in claim 9, it is characterized in that when this first switch conduction, this second switch conducting, the 3rd switch disconnects, the 4th switch disconnects, and when this this error voltage of pulse width modulating signal output indication is less than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch keeping conducting, this second switch transfers disconnection to, the 3rd switch keeping disconnects, and the 4th switch transfer conducting to.

15. power supply change-over devices as claimed in claim 9, it is characterized in that disconnecting when this first switch, this second switch disconnects, the 3rd switch conduction, the 4th switch conduction, this clock signal output one clock cycle of indication starts, and when this this error voltage of pulse width modulating signal output indication is greater than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch transfer conducting to, this second switch maintains disconnection, the 3rd switch transfers disconnection to, and the 4th switch keeping conducting.

16. power supply change-over devices as claimed in claim 9, is characterized in that this Logic control module comprises:

One control signal generation unit, comprising:

One inverter, is used for exporting this anti-phase second control signal;

One first flip-flop, comprises that a data terminal receives this anti-phase second control signal, and a clock termination is received this pulse width modulating signal, and a replacement termination is received one first pulse signal, and an output is exported a step-down index signal;

One second flip-flop, comprises that a data terminal receives this first control signal, and a clock termination is received this clock signal, and a replacement termination is received one second pulse signal, and output output one index signal of boosting;

One first pulse generator, comprise that an input receives this index signal of boosting, and an output is exported this first pulse signal;

One second pulse generator, comprise that an input receives this step-down index signal, and an output is exported this second pulse signal;

One first with door, comprise that a first input end receives this step-down index signal, one second input receives this clock signal, and an output;

One second with door, comprise that a first input end receives this index signal of boosting, one second input receives this clock signal, and an output;

One the 3rd flip-flop, comprise reset end be coupled in this first with this output of door, one first sets termination receives this clock signal, and an output;

One the 4th flip-flop, comprise reset end be coupled in this second with this output of door, one second sets termination receives this clock signal, and an output;

One first pre-driver, comprises that an input is coupled in this output of the 3rd flip-flop, and one first output is exported this first control signal, and one second output is exported the 3rd control signal; And

One second pre-driver, comprises that an input is coupled in this output of the 4th flip-flop, and one first output is exported this second control signal, and one second output is exported the 4th control signal; And

One compensating signal generation unit, comprising:

One the 3rd pulse generator, comprises that an input receives this pulse width modulating signal, and output output one the 3rd pulse signal;

One the 3rd with door, comprise that a first input end receives the 3rd pulse signal, one second input receives this boosting rectifier control signal, and an output;

One inverter, is used for exporting this anti-phase first control signal; And

One or door, comprise a first input end be coupled in the 3rd with door this output, one second input is coupled in this output of this inverter, and an output is exported this slope-compensation control signal.

17. power supply change-over devices as claimed in claim 9, is characterized in that this logic control device comprises:

One control signal generation unit, comprising:

One first inverter, is used for exporting this anti-phase second control signal;

One first flip-flop, comprises that a data terminal receives this anti-phase second control signal, and a clock termination is received this pulse width modulating signal, and one first replacement termination is received one first pulse signal, and one first output is exported a step-down index signal;

One the 3rd flip-flop, comprises that a data terminal receives that this step-down index signal, a clock termination are received this pulse width modulating signal, a replacement termination is received this clock signal, and an output;

One first with door, comprise that a first input end receives this index signal of boosting, one second input receives this clock signal, and an output;

One the 4th flip-flop, comprises that a data terminal receives a system ceiling voltage, a clock termination receive this pulse width modulating signal, reset end be coupled in this first with this output of door, an and output;

One second inverter, comprises that an input is coupled in this output of the 3rd flip-flop, and an output;

One the 3rd inverter, comprises that an input is coupled in this output of the 4th flip-flop, and an output;

One first pre-driver, comprises that an input is coupled in this output of the 3rd inverter, and one first output is exported this first control signal, and one second output is exported the 3rd control signal; And

One second pre-driver, comprises that an input is coupled in this output of the 4th inverter, and one first output is exported this second control signal, and one second output is exported the 4th control signal; And

One compensating signal generation unit, comprising:

One second with door, comprise that a first input end receives the 3rd pulse signal, one second input receives this boosting rectifier control signal, and an output;

One inverter, comprise that an input receives this first control signal, and an output is exported this anti-phase first control signal; And

One or door, comprise a first input end be coupled in this second with door this output, one second input is coupled in this output of this inverter, and an output is exported this slope-compensation control signal.

18. 1 kinds of power supply change-over devices, comprising:

One inductance;

One first switch, is coupled between a first end of an input and this inductance, is used for, according to one first control signal, controlling the conducting situation between this output and this first end;

One second switch, is coupled between one second end and a ground end of this inductance, is used for according to one second control signal, controls the conducting situation between this second end and this ground end;

One the 3rd switch, is coupled between this first end and this ground end of this inductance, is used for according to one the 3rd control signal, controls the conducting situation between this first end and this ground end;

One the 4th switch, is coupled between this second end and an output of this inductance, is used for, according to one the 4th control signal, controlling the conducting situation between this second end and an output; And

One feedback control circuit, be used for according to a switching current of an output voltage of this output, this first switch, export this first control signal, this second control signal, the 3rd control signal and the 4th control signal, to control the conducting order of this first switch, this second switch, the 3rd switch and the 4th switch.

19. power supply change-over devices as claimed in claim 18, is characterized in that this feedback control circuit comprises:

One pulse width modulation module, comprising:

One partial pressure unit, is coupled in this output, is used for exporting a feedback voltage according to this output voltage;

One adder unit, is coupled in current sense unit and this slope-compensation unit, is used for, according to this switching current and this ramp voltage, producing one second reference voltage; And

One clock generation module, is used for producing a clock signal; And

One Logic control module, is used for according to this clock signal and this pulse width modulating signal, produces this first control signal, this second control signal, the 3rd control signal, the 4th control signal and this slope-compensation control signal.

20. power supply change-over devices as claimed in claim 19, is characterized in that this Logic control module is adjusted this slope-compensation control signal, makes this ramp voltage equal a ground terminal potential when this first switch disconnects.

21. power supply change-over devices as claimed in claim 19, it is characterized in that when this first switch conduction and this second switch and the 4th switch alternate conduction, this Logic control module can be when pulse width modulating signal indicates this error voltage to be less than this second reference voltage, adjust this slope-compensation control signal, so that this ramp voltage resets to a ground terminal potential and increases with a fixed slope.

22. power supply change-over devices as claimed in claim 19, it is characterized in that when this first switch conduction, this second switch disconnects, the 3rd switch disconnects, during the 4th switch conduction, this clock signal output one clock cycle of indication starts, and when this this error voltage of pulse width modulating signal output indication is greater than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch keeping conducting, this second switch transfers conducting to, the 3rd switch keeping disconnects, and the 4th switch transfer disconnection to.

23. power supply change-over devices as claimed in claim 19, it is characterized in that when this first switch conduction, this second switch disconnects, the 3rd switch disconnects, the 4th switch conduction, and when this this error voltage of pulse width modulating signal output indication is less than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch transfer disconnection to, this second switch maintains disconnection, the 3rd switch transfers conducting to, and the 4th switch keeping conducting.

24. power supply change-over devices as claimed in claim 19, it is characterized in that when this first switch conduction, this second switch conducting, the 3rd switch disconnects, the 4th switch disconnects, and when this this error voltage of pulse width modulating signal output indication is less than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch keeping conducting, this second switch transfers disconnection to, the 3rd switch keeping disconnects, and the 4th switch transfer conducting to.

25. power supply change-over devices as claimed in claim 19, it is characterized in that disconnecting when this first switch, this second switch disconnects, the 3rd switch conduction, the 4th switch conduction, this clock signal output one clock cycle of indication starts, and when this this error voltage of pulse width modulating signal output indication is greater than this second reference voltage, this Logic control module is by this first control signal, this second control signal, the 3rd control signal and the 4th control signal, control this first switch, this second switch, the 3rd switch and the 4th switch, make this first switch transfer conducting to, this second switch maintains disconnection, the 3rd switch transfers disconnection to, and the 4th switch keeping conducting.

26. power supply change-over devices as claimed in claim 18, is characterized in that this Logic control module comprises:

One control signal generation unit, comprising:

One inverter, is used for exporting this anti-phase second control signal;

One compensating signal generation unit, comprising:

One inverter, is used for exporting this anti-phase first control signal; And

27. power supply change-over devices as claimed in claim 18, is characterized in that this logic control device comprises:

One control signal generation unit, comprising:

One compensating signal generation unit, comprising: