CN103391095A - Three-phase voltage unbalance phase-locked loop based on decoupling control - Google Patents

Three-phase voltage unbalance phase-locked loop based on decoupling control Download PDF

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CN103391095A
CN103391095A CN201310303497XA CN201310303497A CN103391095A CN 103391095 A CN103391095 A CN 103391095A CN 201310303497X A CN201310303497X A CN 201310303497XA CN 201310303497 A CN201310303497 A CN 201310303497A CN 103391095 A CN103391095 A CN 103391095A
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phase
voltage
decoupling zero
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刘晓红
陈恒留
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SHENZHEN JINGFUYUAN TECH Co Ltd
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Abstract

The invention discloses a three-phase voltage unbalance phase-locked loop based on decoupling control. The three-phase voltage unbalance phase-locked loop at least comprises a first phase discriminator, a second phase discriminator, a third phase discriminator, a positive sequence voltage decoupling conversion calculation module, a negative sequence voltage decoupling conversion calculation module, a plurality of low-pass filters connected with the positive sequence voltage decoupling conversion calculation module output end and the negative sequence voltage decoupling conversion calculation module output end, a full-wave integrator and a proportional integral (PI) controller. On the basis that a three-phase voltage signal is decomposed into a positive sequence component, a negative sequence component and a zero sequence component through the first phase discriminator, dq conversion is conducted under two coordinate axes of a positive sequence and a negative sequence respectively, a conversion result under a negative dq coordinate system is used for removing a second harmonic generation component generated when a positive dq coordinate system is converted, and therefore effects of the negative sequence component on a phase-locked result are restrained. By means of the three-phase voltage unbalance phase-locked loop, the positive sequence component can be tracked effectively when the three-phase signal is unbalanced, calculation amount of the phase-locked loop is small, and the phase-locked loop is especially suitable for a real-time control system.

Description

Imbalance of three-phase voltage phase-locked loop based on decoupling zero control
Technical field
The present invention relates to digital lock-in technique, especially relate to a kind of imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero.
Background technology
In the inversion systems such as photovoltaic, in unbalanced source voltage and distortion situation, must be accurately and the phase place of fast detecting line voltage positive sequence fundametal compoment and frequency signal and realize low voltage crossing, need to decompose positive sequence component and the negative sequence component of line voltage, design respectively positive sequence controller and negative phase-sequence controller and adopt time delay control method to realize the low voltage crossing control of line voltage.
Yet, the existing sampled point that adopts delay control method need to store line voltage, the memory space of requirement is larger, and decompose the positive sequence component of line voltage and impact that negative sequence component is subjected to voltage ripple of power network larger, cause controlling poor effect.
Summary of the invention
In order to overcome the defect of prior art, the present invention proposes a kind of imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero, and positive sequence component, negative sequence component and the zero-sequence component of utilizing decoupling method to decomposite in three-phase imbalance voltage realize phase-locked function.
The present invention adopts following technical scheme to realize: a kind of imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero, and it comprises the first phase discriminator, the second phase discriminator, the 3rd phase discriminator, positive sequence voltage decoupling zero conversion computing module, negative sequence voltage decoupling zero conversion computing module at least, several are connected to low pass filter, full-wave integrator and the PI controller of positive sequence voltage decoupling zero conversion computing module output and negative sequence voltage decoupling zero conversion computing module output;
Described the first phase discriminator is used for three-phase voltage u a, u bAnd u cCarry out the conversion of α β coordinate system, obtain positive sequence component and the negative sequence component component on α β coordinate system
Figure BDA00003533812200021
With
Figure BDA00003533812200022
Described the second phase discriminator is connected between the input of the output of described the first phase discriminator and positive sequence voltage decoupling zero conversion computing module, is used for the Output rusults of the first phase discriminator at forward dq coordinate system d +q +Carry out the synchronous conversion of forward, obtain
Figure BDA00003533812200023
With
Described the 3rd phase discriminator is connected between the input of the output of described the first phase discriminator and negative sequence voltage decoupling zero conversion computing module, is used for the Output rusults of the first phase discriminator at negative sense dq coordinate system d -q -Carry out the synchronous conversion of negative sense, obtain
Figure BDA00003533812200025
With
Figure BDA00003533812200026
Described positive sequence voltage decoupling zero conversion computing module and described negative sequence voltage decoupling zero conversion computing module are respectively used to positive sequence voltage, negative sequence voltage are carried out the decoupling zero transformation calculations, utilize negative sense dq coordinate system d -q -Under transformation result eliminate forward dq coordinate system d +q +Two harmonics that produce during conversion;
Described PI controller is used for described positive sequence voltage decoupling zero conversion computing module is exported
Figure BDA00003533812200027
Signal adopts closed-loop control to eliminate deviation;
Described full-wave integrator offers described the second phase discriminator, described the 3rd phase discriminator, described positive sequence voltage decoupling zero conversion computing module and described negative sequence voltage decoupling zero conversion computing module for generation of feedback phase θ '.
Wherein,
Figure BDA00003533812200028
Figure BDA00003533812200029
U +For positive sequence fundamental voltage peak value, U -For negative phase-sequence fundamental voltage peak value,
Figure BDA000035338122000210
The starting phase angle of positive sequence fundamental voltage,
Figure BDA000035338122000211
Be the starting phase angle of negative phase-sequence fundamental voltage, be the time.
Wherein, according to
Figure BDA000035338122000212
Figure BDA000035338122000213
Figure BDA000035338122000214
With The computing formula of described the second phase discriminator and described the 3rd phase discriminator Output rusults is:
Figure BDA000035338122000216
Wherein, described positive sequence voltage decoupling zero conversion computing module carries out the decoupling zero transformation calculations to positive sequence voltage, obtains
Figure BDA000035338122000217
With
Figure BDA000035338122000218
Computing formula is:
Figure BDA00003533812200031
Wherein, described negative sequence voltage decoupling zero conversion computing module carries out the decoupling zero transformation calculations to negative sequence voltage, obtains
Figure BDA00003533812200032
With
Figure BDA00003533812200033
Computing formula is:
Figure BDA00003533812200034
Wherein, the transfer function of described full-wave integrator is 1/s, and s is laplace operator.
Compared with prior art, the present invention has following beneficial effect:
The present invention is based on the imbalance of three-phase voltage phase-locked loop that decoupling zero is controlled, realize with existing delay control method that positive-negative sequence is decomposed and compare, do not need to store the sampled point of line voltage, saved memory space, in addition, the result of decomposition is subjected to the impact of voltage ripple of power network little, and the decomposition effect is better.And,, owing to adopting closed-loop control, can obtain good phase-locked performance, under the condition of three-phase voltage balance, can obtain good effect, but when imbalance of three-phase voltage, the Phase Tracking effect is poor.Moreover the present invention can effectively follow the tracks of out its positive sequence component when three-phase signal is uneven, and the operand of this phase-locked loop is less, is more suitable for using in real-time control system.
Description of drawings
Fig. 1 is the structural representation of Ben Dingming phase-locked loop.
Fig. 2 is two synchronous coordinate system voltage vector schematic diagrames.
Embodiment
The present invention proposes a kind of phase-locked loop of eliminating the impact of Voltage unbalance fully, based on two Synchronous Reference Frame Transforms and decoupling zero, calculate, also locking phase quickly and accurately under the failure conditions such as line voltage frequency discontinuity and single-phase earthing.
As shown in Figure 1, the phase-locked loop of the present invention's proposition comprises the first phase discriminator 11, the second phase discriminator 12, the 3rd phase discriminator 13, positive sequence voltage decoupling zero conversion computing module 14, negative sequence voltage decoupling zero conversion computing module 15, some low pass filters, full-wave integrator 16 and PI controller 17 at least.
The first phase discriminator is with three-phase voltage u a, u bAnd u cCarry out the conversion of α β coordinate system, suppressed the impact of zero-sequence component and obtained positive sequence component and the component of negative sequence component on α β coordinate system
Figure BDA00003533812200041
With
Figure BDA00003533812200042
The decomposition of unbalance voltage vector under two reference synchronization coordinate systems, when the three phase network Voltage unbalance, according to symmetrical component method, the line voltage vector can be described as the synthetic of positive sequence, negative phase-sequence and zero-sequence component.Namely
Figure BDA00003533812200043
Formula (1-1)
In formula (1-1): U +, U -And U 0Respectively positive sequence fundamental voltage peak value, negative phase-sequence fundamental voltage peak value and zero sequence fundamental voltage peak value;
Figure BDA00003533812200044
With
Figure BDA00003533812200045
Respectively the starting phase angle of positive sequence fundamental voltage, the starting phase angle of negative phase-sequence fundamental voltage and the starting phase angle of zero sequence fundamental voltage.
Three-phase voltage u a, u bAnd u cTransform to the two-phase rest frame, zero-sequence component is transformed to zero, thereby has suppressed the impact of zero-sequence component.The line voltage vector can be described as under α β coordinate system:
Figure BDA00003533812200046
Formula (1-2)
In formula (1-2) Be respectively positive sequence component and the negative sequence component component on α β coordinate system.
(1-2) can find out from formula, and on α β coordinate system, voltage vector can be respectively the positive sequence voltage component U with the angular frequency rotation +Negative sequence voltage component U with the rotation take angular frequency as-ω -.As shown in Figure 2, it is comprised of 2 rotating coordinate systems: one is the d with the frequencies omega rotation +q +Coordinate system, the angle of rotation are θ ' (wherein θ ' is the feedback phase of full-wave integrator 16 outputs, and the transfer function of full-wave integrator 16 is 1/s, and s is laplace operator); Another is the d of the rotation take angular frequency as-ω -q -Coordinate system, the angle of rotation is-θ '.
By the Output rusults of 12 pairs of the first phase discriminators 11 of the second phase discriminator at forward dq coordinate system d +q +Carry out the synchronous conversion of forward, obtain
Figure BDA00003533812200048
With
Figure BDA00003533812200049
By the Output rusults of 13 pairs of the first phase discriminators 11 of the 3rd phase discriminator at negative sense dq coordinate system d -q -Carry out the synchronous conversion of negative sense, obtain With
Figure BDA000035338122000411
Formula (1-3)
According to two genlock principles, the rotation angle θ of the synchronous conversion of forward ' should be as far as possible close to
Figure BDA00003533812200052
Namely have
Figure BDA00003533812200053
Figure BDA00003533812200054
Figure BDA00003533812200055
Formula (1-3) is arranged:
Figure BDA00003533812200057
Formula (1-4)
(1-4) can find out by formula, at forward dq coordinate system d +q +Positive-going transition under, the positive sequence component of output voltage has become DC quantity, negative sequence component becomes the alternating current component of 2 ω frequencies; Equally, at negative sense dq coordinate system d -q -Negative going transition under, the negative sequence component of output voltage is DC quantity, and positive sequence component is the alternating current component of 2 ω frequencies.
Then, by 14 pairs of positive sequence voltages of positive sequence voltage decoupling zero conversion computing module, carry out the decoupling zero transformation calculations, obtain
Figure BDA00003533812200058
With
Figure BDA00003533812200059
Shown in (1-5); Carry out the decoupling zero transformation calculations by negative sequence voltage decoupling zero conversion computing module 15 negative sequence voltages, obtain
Figure BDA000035338122000510
With
Figure BDA000035338122000511
Shown in (1-6).
(1-4) is known by formula:
Order
Figure BDA000035338122000513
:
Figure BDA000035338122000514
Formula (1-5)
Known by formula (1-4) equally:
Order:
Figure BDA00003533812200061
:
Figure BDA00003533812200062
Formula (1-6)
Then, by a plurality of output of positive sequence voltage decoupling zero conversion computing module 14, low pass filters pair of negative sequence voltage decoupling zero conversion computing module 15 outputs of being connected to
Figure BDA00003533812200063
With
Figure BDA00003533812200064
Carry out simultaneously low-pass filtering treatment, namely the result of formula (1-5) and formula (1-6) carried out low-pass filtering simultaneously and obtain:
u d + ‾ u q + ‾ = u d + u q + Formula (1-7)
Figure BDA00003533812200066
Formula (1-8)
After phase-locked,
Figure BDA00003533812200067
Substitution formula (1-6)
Figure BDA00003533812200068
Formula (1-9)
Formula (1-8) substitution formula (1-5) is obtained:
u d + * u q + * ≈ u d + u q + - u d - ‾ cos ( 2 θ ′ ) - sin ( 2 θ ′ ) - u q - ‾ sin ( 2 θ ′ ) cos ( 2 θ ′ ) Formula (1-10)
And, the positive sequence voltage decoupling change is changed computing module 14 outputs The closed-loop control of signal adopts PI controller 17 to eliminate deviation.When
Figure BDA000035338122000611
The time, can realize that output phase synchronizes with electric network voltage phase., owing to adopting closed-loop control, can obtain good phase-locked performance.This algorithm under the condition of three-phase voltage balance, can be obtained good effect, but when imbalance of three-phase voltage, the Phase Tracking effect is poor.
Therefore, the present invention on the basis that is decomposed into positive sequence, negative phase-sequence and zero-sequence component, carries out three-phase voltage signal respectively the dq conversion under positive sequence, two reference axis of negative phase-sequence, and utilizes negative sense dq coordinate system d -q -Under transformation result eliminate forward dq coordinate system d +q +Two harmonics that produce during conversion, thus the impact of negative sequence component on phase-locked result suppressed.The present invention can effectively follow the tracks of out its positive sequence component when three-phase signal is uneven, and the operand of this phase-locked loop is less, is more suitable for using in real-time control system.
The foregoing is only preferred embodiment of the present invention,, not in order to limit the present invention, all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims (6)

1. imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero, it is characterized in that, comprise at least the first phase discriminator, the second phase discriminator, the 3rd phase discriminator, positive sequence voltage decoupling zero conversion computing module, negative sequence voltage decoupling zero conversion computing module, several are connected to low pass filter, full-wave integrator and the PI controller of positive sequence voltage decoupling zero conversion computing module output and negative sequence voltage decoupling zero conversion computing module output;
Described the first phase discriminator is used for three-phase voltage u a, u bAnd u cCarry out the conversion of α β coordinate system, obtain positive sequence component and the negative sequence component component on α β coordinate system
Figure FDA00003533812100011
With
Described the second phase discriminator is connected between the input of the output of described the first phase discriminator and positive sequence voltage decoupling zero conversion computing module, is used for the Output rusults of the first phase discriminator at forward dq coordinate system d +q +Carry out the synchronous conversion of forward, obtain
Figure FDA00003533812100013
With
Figure FDA00003533812100014
Described the 3rd phase discriminator is connected between the input of the output of described the first phase discriminator and negative sequence voltage decoupling zero conversion computing module, is used for the Output rusults of the first phase discriminator at negative sense dq coordinate system d -q -Carry out the synchronous conversion of negative sense, obtain
Figure FDA00003533812100015
With
Described positive sequence voltage decoupling zero conversion computing module and described negative sequence voltage decoupling zero conversion computing module are respectively used to positive sequence voltage, negative sequence voltage are carried out the decoupling zero transformation calculations, utilize negative sense dq coordinate system d -q -Under transformation result eliminate forward dq coordinate system d +q +Two harmonics that produce during conversion;
Described PI controller is used for described positive sequence voltage decoupling zero conversion computing module is exported Signal adopts closed-loop control to eliminate deviation;
Described full-wave integrator offers described the second phase discriminator, described the 3rd phase discriminator, described positive sequence voltage decoupling zero conversion computing module and described negative sequence voltage decoupling zero conversion computing module for generation of feedback phase θ '.
2. the imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero according to claim 1, is characterized in that,
Figure FDA00003533812100018
Figure FDA00003533812100019
U +For positive sequence fundamental voltage peak value, U -For negative phase-sequence fundamental voltage peak value,
Figure FDA000035338121000110
The starting phase angle of positive sequence fundamental voltage,
Figure FDA000035338121000111
Be the starting phase angle of negative phase-sequence fundamental voltage, be the time.
3. the imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero according to claim 2, is characterized in that, according to
Figure FDA00003533812100021
Figure FDA00003533812100022
Figure FDA00003533812100023
With
Figure FDA00003533812100024
The computing formula of described the second phase discriminator and described the 3rd phase discriminator Output rusults is:
Figure FDA00003533812100025
4. the imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero according to claim 3 is characterized in that described positive sequence voltage decoupling zero conversion computing module carries out the decoupling zero transformation calculations to positive sequence voltage, obtains
Figure FDA00003533812100026
With Computing formula is:
Figure FDA00003533812100028
5. the imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero according to claim 4 is characterized in that described negative sequence voltage decoupling zero conversion computing module carries out the decoupling zero transformation calculations to negative sequence voltage, obtains With
Figure FDA000035338121000210
Computing formula is:
Figure FDA000035338121000211
6. the imbalance of three-phase voltage phase-locked loop of controlling based on decoupling zero according to claim 1 is characterized in that the transfer function of described full-wave integrator is 1/s, and s is laplace operator.
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CN104935008A (en) * 2015-06-15 2015-09-23 许继集团有限公司 Phase-locked control method for zero-voltage ride through of photovoltaic grid-connected inverter
CN104935008B (en) * 2015-06-15 2017-11-07 许继集团有限公司 A kind of photovoltaic combining inverter no-voltage passes through lock phase control method
CN105449718A (en) * 2015-11-05 2016-03-30 山东大学 Grid-connected synchronous phase-lock method based on improved series signal delay cancellation algorithm
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CN106655277A (en) * 2016-11-23 2017-05-10 北京金自天正智能控制股份有限公司 Improved permanent magnet synchronous motor phase-locked loop method
CN108448966A (en) * 2018-03-21 2018-08-24 华中科技大学 Independent brushless double feed generator negative sequence voltage suppression system under a kind of unbalanced load
CN109412191A (en) * 2018-12-05 2019-03-01 华南理工大学 A kind of phase-lock technique, device and equipment for HVDC transmission system
CN109412191B (en) * 2018-12-05 2021-06-11 华南理工大学 Phase locking method, device and equipment for high-voltage direct-current power transmission system
CN109991844A (en) * 2019-04-22 2019-07-09 福州大学 A kind of d-q Decoupling Controller Design method using embedded decoupling synchronous reference coordinate transform
CN109991844B (en) * 2019-04-22 2021-08-31 福州大学 Design method of d-q decoupling controller adopting embedded decoupling synchronous reference coordinate transformation
CN111835343A (en) * 2020-07-24 2020-10-27 徐州上若科技有限公司 Phase-locked loop based on double decoupling structure
CN111835343B (en) * 2020-07-24 2022-02-18 徐州上若科技有限公司 Phase-locked loop based on double decoupling structure
CN111896798A (en) * 2020-08-04 2020-11-06 中车青岛四方车辆研究所有限公司 Method and device for detecting output unbalanced power of auxiliary converter
CN111896798B (en) * 2020-08-04 2022-12-09 中车青岛四方车辆研究所有限公司 Method and device for detecting output unbalanced power of auxiliary converter
CN112467743A (en) * 2020-11-23 2021-03-09 广西电网有限责任公司电力科学研究院 Control method of flexible switch for resisting three-phase unbalance and harmonic waves
CN114421517A (en) * 2021-11-25 2022-04-29 广州鼎汉轨道交通装备有限公司 Phase-locked loop system
CN114421517B (en) * 2021-11-25 2022-12-13 广州鼎汉轨道交通装备有限公司 Phase-locked loop system

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Application publication date: 20131113