CN103248221A - Voltage reduction converter - Google Patents
Voltage reduction converter Download PDFInfo
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- CN103248221A CN103248221A CN2012100275683A CN201210027568A CN103248221A CN 103248221 A CN103248221 A CN 103248221A CN 2012100275683 A CN2012100275683 A CN 2012100275683A CN 201210027568 A CN201210027568 A CN 201210027568A CN 103248221 A CN103248221 A CN 103248221A
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Abstract
A voltage reduction converter comprises a conversion circuit, a zero-crossing comparator, a current comparator, a voltage comparator and a PFM control circuit, wherein the conversion circuit comprises a switching tube Q1 of which input end is connected with a power supply, a switching tube Q2, an inductor L of which one end is connected with the output end of the switching tube Q1, a capacitor C, and a resistor R1 connected in parallel with the two ends of the capacitor C, wherein the output end of the switching tube Q2 is connected with the output end of the switching tube Q1, and the input end of the switching tube Q2 is grounded; one end of the capacitor C is connected with the inductor L, and the other end of the capacitor C is grounded; the voltage comparator, the zero-crossing comparator and the current comparator input a comparison result to the PFM control circuit for control; and the PFM control circuit outputs a control signal to control disconnection/connection of the switching tube Q1 and the switching tube Q2 according to the comparison results of the voltage comparator, the current comparator and the zero-crossing comparator. According to the voltage reduction converter, the digital signal internally generated is taken as a control signal, the PFM control circuit adopts dynamic part turn-off strategy, and system loss is effectively reduced.
Description
[technical field]
The present invention relates to electronic circuit field, particularly relate to a kind of step-down controller.
[background technology]
Growing along with integrated circuit technology, integrated circuit component is miniaturization more and more, make that the integrated level of integrated circuit is more and more higher, voltage too high in integrated circuit can puncture MOS type field effect transistor (metal-oxide-semiconductor), gently then circuit is not worked, heavy then damage entire circuit, therefore the higher direct voltage that the external world need be provided is reduced to lower direct voltage for integrated circuit work.Suitable supply power voltage can not only be protected integrated circuit, can effectively reduce the power consumption of whole system simultaneously.
Being applied to the system of biomedical engineering, generally all is battery or lithium battery power supply, and require to have portability, characteristics such as can work long hours.This just requires, and the DC-DC electric pressure converter that is applied to the biomedical engineering system need have low-power consumption, high-efficiency characteristics.
The power management DC-DC that can be used for portable medical device comprises: 1, the low pressure difference linearity stabilized voltage power supply (Low Drop Output, LDO); 2, switching capacity translation circuit (Switched Capacitor Converter); 3, type switching power DC-DC.
LDO has ultralow output voltage noise, and this is its sharpest edges, but the shortcoming of LDO linear stabilized power supply is when the voltage difference between input voltage and the output voltage is big, adjust loss on the pipe big, cause efficient very low.
The DC-DC transducer load capacity of switched capacitor is poor, and is also inapplicable in the situation that compares heavy load.In addition, because in the modern microelectronic technique, the resistance that is integrated in the chip generally is no more than 500K Ω, electric capacity is no more than 50pF, this is that the non-linear of them will greatly damage the performance of circuit, lose more than gain because if integrated resistor or integrated capacitance surpass these values.In view of the peculiar characteristics of switching capacity: electric capacity is big, and these characteristics make the application of switching capacity that certain limitation arranged.
Traditional type switching power DC-DC transducer comprises pulse width modulation (Pulse-Width Modulation, PWM) control mode, perhaps pulse width modulation and pulse frequency modulated (Pulse-Frequency Modulation, PFM) hybrid modulation (PWM/PFM) mode.
In the PWM control mode, because switching power tube and rectifying tube are in the switch transition state always, and frequency is generally all higher, reach several MHz, thereby produce very big switching loss, cause great system power dissipation loss, under the underloading situation, efficient descends rapidly.The power management request that is unfavorable for biomedical engineering field.And the needed structure more complicated of PFM control method needs extra negative delay, monostable triggering signal (one-shot) that module etc. takes place, and more module causes system's instability easily, shakes easily, and produces extra power consumption loss.
[summary of the invention]
Based on this, low at traditional step-down conversion regime efficient, and produce the problem of extra power consumption loss, be necessary to provide a kind of step-down controller of low power consumption high efficiency.
A kind of step-down controller comprises translation circuit, zero-crossing comparator, current comparator, voltage comparator and PFM control circuit
Described translation circuit comprises that switching tube Q1 that input is connected with power supply, output is connected input end grounding with described switching tube Q1 output switching tube Q2, inductance L, an end that an end is connected with described switching tube Q1 output are connected the capacitor C of other end ground connection and are connected in parallel on the resistance R 1 at described capacitor C two ends with described inductance L;
The inverting input of described voltage comparator is connected node, the normal phase input end input reference voltage between described inductance L and described capacitor C, and comparative result is imported described PFM control circuit;
The normal phase input end of described current comparator and the current peak that the input of described switching tube Q1 is connected, inverting input is imported described inductance L, and comparative result imported described PFM control circuit;
The normal phase input end of described zero-crossing comparator is connected with described switching tube Q1 output, reverse inter-input-ing ending grounding, and comparative result is imported described PFM control circuit;
Described PFM control circuit is according to the comparative result output control switch pipe Q1 of described voltage comparator, current comparator and zero-crossing comparator and the control signal of switching tube Q2 break-make.
Preferably, described current comparator comprises positive current mirror module, negative-phase sequence curent mirror module, wherein,
The electric current I of described current comparator normal phase input end input
In+ through the electric current I of described positive current mirror module mirror image and described current comparator inverting input input
In-be mirrored to same node through described negative-phase sequence curent mirror module;
If I
In+ greater than I
In-, then the voltage of described node is drawn high at described current comparator output output high level;
If I
In+ less than I
In-, then the voltage of described node is dragged down in described current comparator output output low level.
Preferably, described positive current mirror module comprises first current mirror, second current mirror, wherein,
First current mirror comprises N-channel MOS pipe NMOS1, metal-oxide-semiconductor NMOS2, metal-oxide-semiconductor NMOS3, metal-oxide-semiconductor NMOS4 and resistance R 2, wherein,
Described metal-oxide-semiconductor NMOS1 source electrode inserts electric current I through described resistance R 2
In+, grid is connected the back and inserts electric current I with described metal-oxide-semiconductor NMOS2 grid
In+, drain electrode is connected with described metal-oxide-semiconductor NMOS3 source electrode, the grid of described metal-oxide-semiconductor NMOS3 is connected with described metal-oxide-semiconductor NMOS4 grid that the back is connected with described metal-oxide-semiconductor NMOS1 source electrode, drain electrode and described metal-oxide-semiconductor NMOS4 grounded drain, described metal-oxide-semiconductor NMOS4 source electrode is connected with described metal-oxide-semiconductor NMOS2 drain electrode, and described metal-oxide-semiconductor NMOS2 source electrode is connected with described second current mirror;
Second current mirror comprises P channel MOS tube PMOS1, metal-oxide-semiconductor PMOS2, metal-oxide-semiconductor PMOS3, metal-oxide-semiconductor PMOS4 and resistance R 3, wherein,
Described metal-oxide-semiconductor PMOS1 source electrode through described resistance R 3 connect described metal-oxide-semiconductor NMOS2 source electrode, grid and insert described metal-oxide-semiconductor NMOS2 source electrode after described metal-oxide-semiconductor PMOS2 grid is connected, drain electrode is connected with described metal-oxide-semiconductor PMOS3 source electrode, the grid of described metal-oxide-semiconductor PMOS3 is connected with described metal-oxide-semiconductor PMOS4 grid afterwards and is connected with described metal-oxide-semiconductor PMOS1 source electrode, drain electrode is connected with described metal-oxide-semiconductor PMOS4 drain electrode, described metal-oxide-semiconductor PMOS4 source electrode is connected with described metal-oxide-semiconductor PMOS2 drain electrode, described metal-oxide-semiconductor PMOS2 source electrode output positive image current.
Preferably, described negative-phase sequence curent mirror module comprises N-channel MOS pipe NMOS5, metal-oxide-semiconductor NMOS6, metal-oxide-semiconductor NMOS7, metal-oxide-semiconductor NMOS8 and resistance R 4, wherein,
Described metal-oxide-semiconductor NMOS5 source electrode inserts electric current I through described resistance R 4
In-, grid is connected the back and inserts electric current I with described metal-oxide-semiconductor NMOS6 grid
In-, drain electrode is connected with described metal-oxide-semiconductor NMOS7 source electrode, described metal-oxide-semiconductor NMOS7 grid is connected with described metal-oxide-semiconductor NMOS8 grid that the back is connected with described metal-oxide-semiconductor NMOS5 source electrode, drain electrode and described metal-oxide-semiconductor NMOS8 grounded drain, described metal-oxide-semiconductor NMOS8 source electrode is connected with described metal-oxide-semiconductor NMOS6 drain electrode, and described metal-oxide-semiconductor NMOS6 source electrode is exported anti-phase image current and is connected with described metal-oxide-semiconductor PMOS2 source electrode and exports the positive image current and meet.
Preferably, described current comparator also comprises first inverter, second inverter, wherein,
Described first inverter comprises P channel MOS tube PMOS5, N-channel MOS pipe NMOS9, and described metal-oxide-semiconductor PMOS5 source electrode is connected with described metal-oxide-semiconductor PMOS4 drain electrode, drain electrode is connected with described metal-oxide-semiconductor NMOS9 source electrode, grid is connected the back with described metal-oxide-semiconductor NMOS9 abreviation and inserts described node;
Described second inverter comprises P channel MOS tube PMOS6, N-channel MOS pipe NMOS10, and the node that described metal-oxide-semiconductor PMOS6 source electrode is connected with described metal-oxide-semiconductor PMOS5 source electrode, grid is connected with described metal-oxide-semiconductor NMOS10 grid afterwards and described metal-oxide-semiconductor PMOS5 drain electrode is connected, drain electrode is connected with described metal-oxide-semiconductor NMOS10 source electrode is described current comparator output.
Preferably, described PFM control module comprises and door, first not gate, second not gate or door, NOR gate and rest-set flip-flop, wherein,
Describedly be connected with the output of the output of described voltage comparator and zero-crossing comparator respectively with door two inputs, output holds with the R of described rest-set flip-flop and is connected, described or door one input through described first not gate be connected with the output of described voltage comparator that another input is connected with described current comparator output, output holds with the S of described rest-set flip-flop and is connected, the input of described first not gate is connected with the output of voltage comparator, output with or an input be connected;
The Q of described rest-set flip-flop end output break-make control signal through drive unit drives to control described switching tube Q1 break-make;
The Q of described rest-set flip-flop end is connected with described NOR gate one input through described second not gate, another input of described NOR gate is connected with the output of described zero-crossing comparator, output export the break-make control signal through drive unit drives to control described switching tube Q2 break-make.
Preferably, also comprise current detection circuit, described current comparator normal phase input end is connected through the input of described current detection circuit with described switching tube Q1.
Preferably, described current detection circuit comprises P channel MOS tube PMOS7, metal-oxide-semiconductor PMOS8 and amplifier, wherein,
Described switching tube Q1 is the P channel power MOS pipe, described switching tube Q2 is N raceway groove rectification metal-oxide-semiconductor, described metal-oxide-semiconductor PMOS7 is connected with described power MOS pipe cascade, described metal-oxide-semiconductor PMOS7 drain electrode inserts described amplifier one input and connects, another input of described amplifier is connected with described metal-oxide-semiconductor PMOS8 source electrode and the drain electrode of described power MOS pipe, output is connected with described metal-oxide-semiconductor PMOS8 grid, and described metal-oxide-semiconductor PMOS8 drain electrode output detects electric current.
Preferably, also comprise band-gap reference, described voltage comparator is hysteresis comparator, and described band-gap reference is connected with described hysteresis comparator normal phase input end.
Preferably, also comprise divider resistance R5 and divider resistance R6, described hysteresis comparator normal phase input end through described divider resistance R5 be connected node between described inductance L and described capacitor C, through described divider resistance R6 ground connection.
Above-mentioned step-down controller detects the inductance L electric current by current comparator and whether arrives peaking, thereby send a signal to closing of PFM control circuit control switch pipe Q1, whether the drain voltage of zero-crossing comparator sense switch pipe Q1 is negative, whether thereby it is reverse to detect the inductance L electric current, send a signal to closing of PFM control circuit control switch pipe Q2, thereby stoped energy to flow to ground from capacitor C, caused meaningless power consumption penalty.Adopt the inner digital signal that produces as control signal, thereby saved control modules such as extra negative delay, monostable triggering signal, improved the stability of circuit, reduced circuit structure complexity and power consumption.Simultaneously, adopt dynamic part to turn-off strategy in the PFM control circuit, effectively reduce system loss, improved efficient.
[description of drawings]
Fig. 1 is the structured flowchart of step-down controller;
Fig. 2 is the schematic diagram of the step-down controller in the preferred embodiment;
Fig. 3 is the schematic diagram of the current comparator in the preferred embodiment;
Fig. 4 is the schematic diagram of the current detection circuit in the preferred embodiment;
Fig. 5 is the schematic diagram of the voltage comparator in the preferred embodiment;
Fig. 6 is the inductive current I under the step-down controller continuous mode
LControl signal with switching tube Q1 and switching tube Q2;
Fig. 7 is input as V for working as
InDuring=5V, output voltage V
OutWith inductive current I
LSimulation waveform;
Fig. 8 is input as V for working as
InDuring=3.5V, output voltage V
OutWith inductive current I
LSimulation waveform;
Fig. 9 is input as step voltage V
In=6V is to V
InSimulation waveform during=3.5V;
Figure 10 is that load current is step current I
Load=0mA is to I
LoadOutput waveform during=24mA;
Figure 11 is the efficiency curve of load current when changing to 10mA from 0.
[embodiment]
In order to make purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is described in more detail.Should be appreciated that specific embodiment described herein only in order to explaining the present invention, and be not used in restriction the present invention.
As shown in Figure 1, a kind of step-down controller comprises translation circuit 100, current comparator 200, zero-crossing comparator 300, voltage comparator 400 and PFM control circuit 500.
As shown in Figure 2, the normal phase input end of current comparator 200 be connected with the input of switching tube Q1, the current peak I of inverting input input inductance L
Peak, and with comparative result V
IeInput PFM control circuit 500.Current comparator 200 detects inductive current I
LWhether arrive peak I
PeakThereby, utilize closing of PFM control circuit 500 control switch pipe Q1.
The normal phase input end of zero-crossing comparator 300 is connected with switching tube Q1 output, reverse inter-input-ing ending grounding, and with comparative result V
InvInput PFM control circuit 500.The output voltage V of zero-crossing comparator 300 sense switch pipe Q1
SwWhether be negative, thereby inspection judges whether the electric current of inductance L is reverse, and close switching tube Q2, thereby stoped energy to flow to ground from capacitor C, cause meaningless power consumption penalty.
The inverting input of voltage comparator 400 is connected node, the normal phase input end input reference voltage V between inductance L and capacitor C
Ref, and comparative result imported PFM control circuit 500.In the present embodiment, voltage comparator 400 is preferably hysteresis comparator, and band-gap reference 700 is connected to voltage comparator 400 with the hysteresis comparator normal phase input end reference voltage V is provided
Ref
Be connected with the output of the output of voltage comparator 400 and zero-crossing comparator 300 respectively with door two inputs, output is connected with the R end of rest-set flip-flop M, or door one input through first not gate be connected with the output of voltage comparator 400 that another input is connected with current comparator 200 outputs, output holds with the S of rest-set flip-flop M and is connected, the input of first not gate is connected with the output of voltage comparator 400, output with or an input be connected.
The Q end output break-make control signal PFM_P of rest-set flip-flop M drives with control switch pipe Q1 break-make through driver element 502.The Q end of rest-set flip-flop M connects through the second not gate AND, one input, and another input of NOR gate is connected with the output of zero-crossing comparator 300, output output break-make control signal PFM_N drives with control switch pipe Q2 break-make through driver element 502.
As shown in Figure 3, in the present embodiment, current comparator 200 comprises positive current mirror module 210, negative-phase sequence curent mirror module 220, first inverter 230 and second inverter 240.
The electric current I of current comparator 200 normal phase input ends input
In+ through the electric current I of positive current mirror module 210 mirror images and current comparator 200 inverting inputs input
In-(inductance peak current I
Peak) be mirrored to same node a through negative-phase sequence curent mirror module 220;
Positive current mirror module 210 comprises first current mirror 202 and second current mirror 204.
First current mirror 202 comprises N-channel MOS pipe NMOS1, metal-oxide-semiconductor NMOS2, metal-oxide-semiconductor NMOS3, metal-oxide-semiconductor NMOS4 and resistance R 2.
Metal-oxide-semiconductor NMOS1 source electrode inserts electric current I through resistance R 2
In+, grid is connected the back and inserts electric current I with metal-oxide-semiconductor NMOS2 grid
In+, drain electrode is connected with metal-oxide-semiconductor NMOS3 source electrode, the grid of metal-oxide-semiconductor NMOS3 is connected with metal-oxide-semiconductor NMOS4 grid that the back is connected with metal-oxide-semiconductor NMOS1 source electrode, drain electrode and metal-oxide-semiconductor NMOS4 grounded drain, metal-oxide-semiconductor NMOS4 source electrode is connected with metal-oxide-semiconductor NMOS2 drain electrode, and metal-oxide-semiconductor NMOS2 source electrode is connected with second current mirror 204;
Second current mirror 204 comprises P channel MOS tube PMOS1, metal-oxide-semiconductor PMOS2, metal-oxide-semiconductor PMOS3, metal-oxide-semiconductor PMOS4 and resistance R 3.
Metal-oxide-semiconductor PMOS1 source electrode through resistance R 3 connect metal-oxide-semiconductor NMOS2 source electrode, metal-oxide-semiconductor PMOS1 grid and insert metal-oxide-semiconductor NMOS2 source electrode after metal-oxide-semiconductor PMOS2 grid is connected, metal-oxide-semiconductor PMOS1 drain electrode is connected with metal-oxide-semiconductor PMOS3 source electrode, the grid of metal-oxide-semiconductor PMOS3 is connected with metal-oxide-semiconductor PMOS4 grid afterwards and is connected with metal-oxide-semiconductor PMOS1 source electrode, metal-oxide-semiconductor PMOS3 drain electrode is connected with metal-oxide-semiconductor PMOS4 drain electrode, metal-oxide-semiconductor PMOS4 source electrode is connected with metal-oxide-semiconductor PMOS2 drain electrode, metal-oxide-semiconductor PMOS2 source electrode output positive image current.
Negative-phase sequence curent mirror module 220 comprises N-channel MOS pipe NMOS5, metal-oxide-semiconductor NMOS6, metal-oxide-semiconductor NMOS7, metal-oxide-semiconductor NMOS8 and resistance R 4.
Metal-oxide-semiconductor NMOS5 source electrode inserts electric current I through resistance R 4
In-, metal-oxide-semiconductor NMOS5 grid is connected the back and inserts electric current I with metal-oxide-semiconductor NMOS6 grid
In-, metal-oxide-semiconductor NMOS5 drain electrode is connected with metal-oxide-semiconductor NMOS7 source electrode, metal-oxide-semiconductor NMOS7 grid is connected with metal-oxide-semiconductor NMOS8 grid afterwards and is connected with metal-oxide-semiconductor NMOS5 source electrode, metal-oxide-semiconductor NMOS7 drain electrode and metal-oxide-semiconductor NMOS8 grounded drain, metal-oxide-semiconductor NMOS8 source electrode and metal-oxide-semiconductor NMOS6 drain electrode is connected, and metal-oxide-semiconductor NMOS6 source electrode is exported anti-phase image current and is connected with metal-oxide-semiconductor PMOS2 source electrode and exports the positive image current and meet at node a.
If I
In+ greater than I
In-, then the voltage of node a is drawn high at current comparator 200 outputs output high level, namely this moment V
0Be high level; If I
In+ less than I
In-, then the voltage of node a is dragged down in current comparator 200 output output low levels, namely this moment V
0Be low level.
As shown in Figure 5, be the schematic diagram of voltage comparator 400, this voltage comparator 400 adopts the most classical voltage comparator, and is simple in structure, low in energy consumption, is applicable to very much the low-power consumption requirement of portable medical device.
With reference to figure 2, the input with switching tube Q1 is connected current comparator 200 normal phase input ends through current detecting road 600.
As shown in Figure 4, current detection circuit 600 comprises P channel MOS tube PMOS7, metal-oxide-semiconductor PMOS8 and amplifier, wherein,
As mentioned above, switching tube Q1 is the P channel power MOS pipe, switching tube Q2 is N raceway groove rectification metal-oxide-semiconductor, metal-oxide-semiconductor PMOS7 and switching tube Q1, be that the power MOS pipe cascade connects, metal-oxide-semiconductor PMOS7 drain electrode inserts amplifier one input and connects, and another input of amplifier is connected with metal-oxide-semiconductor PMOS8 source electrode and power MOS pipe (switching tube Q1) drain electrode, output is connected with metal-oxide-semiconductor PMOS8 grid, and metal-oxide-semiconductor PMOS8 drain electrode output detects electric current I
In+.
According to:
Wherein, I
dBe the drain current that metal-oxide-semiconductor PMOS7 flows through, conducting electric current just.
μ is the surface mobility (cm of N raceway groove or P-channel device
2/ V*s).
Cox is unit are gate oxide capacitance (F/cm
2).
W and L are respectively effective channel width and the length of metal-oxide-semiconductor PMOS7.
V
GSBe the grid of metal-oxide-semiconductor PMOS7 and the voltage between the source electrode.
V
ThIt is the threshold voltage of metal-oxide-semiconductor PMOS7.
Work as V
GS(PMOS7)=V
GS(Q1) time, we as can be known
Wherein, I
D(PMOS7) and I
D(Q1) be the conducting electric current of metal-oxide-semiconductor PMOS7 and switching tube Q1 respectively, W and L are respectively width and the length of metal-oxide-semiconductor PMOS7.
From formula (3) I as can be seen
In+ and inductive current I
LBetween relational expression determined by the breadth length ratio of metal-oxide-semiconductor PMOS7 and switching tube Q1, therefore, thereby can detect accurate inductive current I by the breadth length ratio of controlling them
L
As shown in Figure 2, comprise divider resistance R5 and divider resistance R6, hysteresis comparator be voltage comparator 400 normal phase input end through divider resistance R5 be connected node between inductance L and capacitor C, through divider resistance R6 ground connection.
The basic topological structure of translation circuit 100 as shown in Figure 2.V
InBe input voltage, be generally external power source.Switching tube Q1 and switching tube Q2 are power MOS pipe and rectification metal-oxide-semiconductor.Switching tube Q1 and switching tube Q2 adopt the metal-oxide-semiconductor with very big breadth length ratio to realize usually in the practical application.In course of normal operation, switching tube Q1 and switching tube Q2 are once open-minded with certain time sequence, wherein the ON time of switching tube Q1 is ton, the ratio of its shared whole switch periods is referred to as the conducting duty ratio, represent with D, the ratio that the ON time toff of switching tube Q2 accounts for whole switch periods is called the shutoff duty ratio, represents with Doff.
Suppose that at first switching tube Q1 and switching tube Q2 are perfect switches, their conducting resistance is 0, supposes that the time of conducting adds that the time of not conducting is switch periods.Because ON time adds that the turn-off time equals switch periods, in the inductance electric current can not occur dropping to zero situation, so be referred to as again the electric current continuous operation mode (Continuous Conduction Mode, CCM).
In a switch periods T, 0-t
OnSwitching tube Q1 conducting in time, electric current just by inductance L, power to load by switching tube Q1 and capacitor C, and at this moment inductance L is as the energy storage original paper.At this moment node SW voltage V
SwEqual input voltage V
In, inductive current rises according to fixing slope, and its slope can be expressed as:
S
on＝(V
in-V
out)/L (4)
Wherein, S
OnBe inductive current I
LThe slope that rises, V
InAnd V
OutBe respectively input voltage and output voltage, L is the value of inductance.
So at t
On-T is in the time, and switching tube Q1 turn-offs, and switching tube Q2 opens, and energy stored discharges to load and capacitor C in the inductance L, node SW voltage V at this moment
SwEqual 0.Get electric current I in the inductance L
LWill descend according to fixing slope, its slope is:
S
off＝V
out/L (5)
In one-period, the SW average voltage is:
A
sw＝D*V
in
Wherein, S
OffBe inductive current I
LThe slope that descends, A
SwVoltage V for node SW
SwAverage.
Because the voltage V of node SW
SwComprise the effect of all chopper circuits.Change value and the output voltage of inductive current can be expressed as respectively:
V
out＝D*V
in (7)
Wherein, Δ I
LBe the change value of inductive current, T is switch periods, t
OnBe the time of switching tube Q1 conducting, D is the duty ratio of switching tube Q1 conducting.
Top analysis is based on: the time of conducting adds that the time of shutoff is whole switch periods, supposes that the inductance L in the circuit is smaller, the outputting inductance electric current I
LDuring smaller or situation that switch periods T is long, when inductive current dropped to zero, the new cycle did not still begin, this situation be called as the inductive current discontinuous mode (Discontinuous Conduction Mod, DCM).At this moment, control signal CLK_PMOS and the CLK_NMOS of switching tube Q1 and switching tube Q2, the inductive current I on the inductance L
LAs shown in Figure 6.Inductive current I
LChange value and output voltage can be expressed as respectively:
Wherein, T
OffBe the turn-off time of switch.
The DC-DC converter output voltage V of this structure
OutAll be lower than or equal input voltage V
InSo we are referred to as the buck transducer.
As shown in Figure 7 and Figure 8, be respectively: work as V
In=5V and V
InOutput voltage V during=3.5V
OutWith inductive current I
LSimulation result.This shows that in very big input range, output voltage can keep an invariable output voltage V
OutConstant.
As shown in Figure 9, further with the input voltage of a step, V
In=3.5V is to V
In=6V, the output voltage that obtains still are V
Out=2.5V, and ripple is very little, has only tens millivolts.
As shown in figure 10, with the load current of a step, I
Load=0mA is to I
Load=24mA, the output voltage that obtains still are VOUT=2.5V, and enough application of medical chip of load capacity of this chip are described.
As shown in figure 11, be the conversion efficiency curve under the different loads electric current that obtains after the step-down controller emulation.
Please refer to Fig. 1, the syndeton of step-down controller is: the output dc voltage V of series connection divider resistance R5 and divider resistance R6 and translation circuit 100
OutJoin, and with a part of output voltage V
FbFeed back to the inverting input of voltage comparator 100, with the reference voltage V of band-gap reference BGR generation
RefCompare output level V
OelOutput V with zero-crossing comparator 300
InvSignal is set to " 0 " by a R end (clear terminal) with the rest-set flip-flop M of door in (AND gate) control circuit with control signal PFM_P, and generation signal CLK_PMOS control switch pipe Q1 makes its conducting through overdrive circuit 502 after.The source electrode of current detection circuit 600 inputs and switching tube Q1 joins, output current I
In+ insert the positive input of current comparator 200, with the reference current I of reverse input end
PeakAfter comparing, produce signal V
IeThe output level V of hysteresis comparator (voltage comparator 400)
OelThrough first not gate oppositely back and signal V
IeProcess or door (OR gate), the S end (set end) of the rest-set flip-flop M in the control circuit is set to " 1 " with control signal PFM_P.The positive input of zero-crossing comparator 300 inserts the voltage V of inductance L anode
Sw, reverse input end ground connection GND, output V
Inv, the control signal PFM_P of switching tube Q1 is through second not gate oppositely back and this signal V
InvInsert NOR gate (NOR gate) and produce signal PFM_N, produce the control signal CLK_NMOS of switching tube Q2 through overdrive circuit 502.Control signal CLK_PMOS and CLK_NMOS insert the grid of switching tube Q1 and switching tube Q2 respectively.Simultaneously, when switching tube Q1 turn-offs, carry out current ratio with regard to not needing current comparator 200, also do not need current detection circuit 600 to detect electric current I simultaneously
In+, therefore, the present invention adopts dynamic shutoff strategy, current comparator 200 and current detection circuit 600 is turn-offed, thereby reduced meaningless power loss, has improved conversion efficiency.To solve long-pending big, high, the inefficient problem of cost of big, the additional clock circuit body of main switching device switching loss that existing DC-DC converter exists.Make in its application that well is applicable to medical chip.
In addition, step-down controller in the course of the work, quiescent current only has tens nanowatts.In addition, adopt the inner digital signal that produces as control signal, thereby saved control modules such as extra negative delay, one-shot, improved the stability of circuit, reduced circuit structure complexity and power consumption.Simultaneously, adopt dynamic part to turn-off strategy in the PFM control circuit 500, effectively reduce system loss, improved efficient.Thereby be applicable to the biomedical devices of low-power consumption requirement.
The above embodiment has only expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to claim of the present invention.Should be pointed out that for the person of ordinary skill of the art without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.
Claims (10)
1. a step-down controller is characterized in that, comprises translation circuit, zero-crossing comparator, current comparator, voltage comparator and PFM control circuit
Described translation circuit comprises that switching tube Q1, output that input is connected with power supply are connected with described switching tube Q1 output and the switching tube Q2 of input end grounding, inductance L, an end that an end is connected with described switching tube Q1 output are connected the capacitor C of other end ground connection with described inductance L and be connected in parallel on the resistance R 1 at described capacitor C two ends;
The inverting input of described voltage comparator is connected node, the normal phase input end input reference voltage between described inductance L and described capacitor C, and comparative result is imported described PFM control circuit;
The normal phase input end of described current comparator and the current peak that the input of described switching tube Q1 is connected, inverting input is imported described inductance L, and comparative result imported described PFM control circuit;
The normal phase input end of described zero-crossing comparator is connected with described switching tube Q1 output, reverse inter-input-ing ending grounding, and comparative result is imported described PFM control circuit;
Described PFM control circuit is according to the comparative result output control switch pipe Q1 of described voltage comparator, current comparator and zero-crossing comparator and the control signal of switching tube Q2 break-make.
2. step-down controller according to claim 1 is characterized in that, described current comparator comprises positive current mirror module, negative-phase sequence curent mirror module, wherein,
The electric current I of described current comparator normal phase input end input
In+ through the electric current I of described positive current mirror module mirror image and described current comparator inverting input input
In-be mirrored to same node through described negative-phase sequence curent mirror module;
If I
In+ greater than I
In-, then the voltage of described node is drawn high at described current comparator output output high level;
If I
In+ less than I
In-, then the voltage of described node is dragged down in described current comparator output output low level.
3. step-down controller according to claim 2 is characterized in that, described positive current mirror module comprises first current mirror, second current mirror, wherein,
First current mirror comprises N-channel MOS pipe NMOS1, metal-oxide-semiconductor NMOS2, metal-oxide-semiconductor NMOS3, metal-oxide-semiconductor NMOS4 and resistance R 2, wherein,
Described metal-oxide-semiconductor NMOS1 source electrode inserts electric current I through described resistance R 2
In+, grid is connected the back and inserts electric current I with described metal-oxide-semiconductor NMOS2 grid
In+, drain electrode is connected with described metal-oxide-semiconductor NMOS3 source electrode, the grid of described metal-oxide-semiconductor NMOS3 is connected with described metal-oxide-semiconductor NMOS4 grid that the back is connected with described metal-oxide-semiconductor NMOS1 source electrode, drain electrode and described metal-oxide-semiconductor NMOS4 grounded drain, described metal-oxide-semiconductor NMOS4 source electrode is connected with described metal-oxide-semiconductor NMOS2 drain electrode, and described metal-oxide-semiconductor NMOS2 source electrode is connected with described second current mirror;
Second current mirror comprises P channel MOS tube PMOS1, metal-oxide-semiconductor PMOS2, metal-oxide-semiconductor PMOS3, metal-oxide-semiconductor PMOS4 and resistance R 3, wherein,
Described metal-oxide-semiconductor PMOS1 source electrode through described resistance R 3 connect described metal-oxide-semiconductor NMOS2 source electrode, grid and insert described metal-oxide-semiconductor NMOS2 source electrode after described metal-oxide-semiconductor PMOS2 grid is connected, drain electrode is connected with described metal-oxide-semiconductor PMOS3 source electrode, the grid of described metal-oxide-semiconductor PMOS3 is connected with described metal-oxide-semiconductor PMOS4 grid afterwards and is connected with described metal-oxide-semiconductor PMOS1 source electrode, drain electrode is connected with described metal-oxide-semiconductor PMOS4 drain electrode, described metal-oxide-semiconductor PMOS4 source electrode is connected with described metal-oxide-semiconductor PMOS2 drain electrode, described metal-oxide-semiconductor PMOS2 source electrode output positive image current.
4. step-down controller according to claim 3 is characterized in that, described negative-phase sequence curent mirror module comprises N-channel MOS pipe NMOS5, metal-oxide-semiconductor NMOS6, metal-oxide-semiconductor NMOS7, metal-oxide-semiconductor NMOS8 and resistance R 4, wherein,
Described metal-oxide-semiconductor NMOS5 source electrode inserts electric current I through described resistance R 4
In-, grid is connected the back and inserts electric current I with described metal-oxide-semiconductor NMOS6 grid
In-, drain electrode is connected with described metal-oxide-semiconductor NMOS7 source electrode, described metal-oxide-semiconductor NMOS7 grid is connected with described metal-oxide-semiconductor NMOS8 grid that the back is connected with described metal-oxide-semiconductor NMOS5 source electrode, drain electrode and described metal-oxide-semiconductor NMOS8 grounded drain, described metal-oxide-semiconductor NMOS8 source electrode is connected with described metal-oxide-semiconductor NMOS6 drain electrode, and described metal-oxide-semiconductor NMOS6 source electrode is exported anti-phase image current and is connected with described metal-oxide-semiconductor PMOS2 source electrode and exports the positive image current and meet.
5. step-down controller according to claim 4 is characterized in that, described current comparator also comprises first inverter, second inverter, wherein,
Described first inverter comprises P channel MOS tube PMOS5, N-channel MOS pipe NMOS9, and described metal-oxide-semiconductor PMOS5 source electrode is connected with described metal-oxide-semiconductor PMOS4 drain electrode, drain electrode is connected with described metal-oxide-semiconductor NMOS9 source electrode, grid is connected the back with described metal-oxide-semiconductor NMOS9 abreviation and inserts described node;
Described second inverter comprises P channel MOS tube PMOS6, N-channel MOS pipe NMOS10, and the node that described metal-oxide-semiconductor PMOS6 source electrode is connected with described metal-oxide-semiconductor PMOS5 source electrode, grid is connected with described metal-oxide-semiconductor NMOS10 grid afterwards and described metal-oxide-semiconductor PMOS5 drain electrode is connected, drain electrode is connected with described metal-oxide-semiconductor NMOS10 source electrode is described current comparator output.
6. step-down controller according to claim 1 is characterized in that, described PFM control module comprises and door, first not gate, second not gate or door, NOR gate and rest-set flip-flop, wherein,
Describedly be connected with the output of the output of described voltage comparator and zero-crossing comparator respectively with door two inputs, output holds with the R of described rest-set flip-flop and is connected, described or door one input through described first not gate be connected with the output of described voltage comparator that another input is connected with described current comparator output, output holds with the S of described rest-set flip-flop and is connected, the input of described first not gate is connected with the output of voltage comparator, output with or an input be connected;
The Q of described rest-set flip-flop end output break-make control signal through drive unit drives to control described switching tube Q1 break-make;
The Q of described rest-set flip-flop end is connected with described NOR gate one input through described second not gate, another input of described NOR gate is connected with the output of described zero-crossing comparator, output export the break-make control signal through drive unit drives to control described switching tube Q2 break-make.
7. step-down controller according to claim 1 is characterized in that, also comprises current detection circuit, and described current comparator normal phase input end is connected through the input of described current detection circuit with described switching tube Q1.
8. step-down controller according to claim 7 is characterized in that, described current detection circuit comprises P channel MOS tube PMOS7, metal-oxide-semiconductor PMOS8 and amplifier, wherein,
Described switching tube Q1 is the P channel power MOS pipe, described switching tube Q2 is N raceway groove rectification metal-oxide-semiconductor, described metal-oxide-semiconductor PMOS7 is connected with described power MOS pipe cascade, described metal-oxide-semiconductor PMOS7 drain electrode inserts described amplifier one input and connects, another input of described amplifier is connected with described metal-oxide-semiconductor PMOS8 source electrode and the drain electrode of described power MOS pipe, output is connected with described metal-oxide-semiconductor PMOS8 grid, and described metal-oxide-semiconductor PMOS8 drain electrode output detects electric current.
9. step-down controller according to claim 1 is characterized in that, also comprises band-gap reference, and described voltage comparator is hysteresis comparator, and described band-gap reference is connected with described hysteresis comparator normal phase input end.
10. according to claim 1 or 9 described step-down controllers, it is characterized in that, also comprise divider resistance R5 and divider resistance R6, described hysteresis comparator normal phase input end through described divider resistance R5 be connected node between described inductance L and described capacitor C, through described divider resistance R6 ground connection.
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