CN103064456B - Reaction type extra-high precision voltage source - Google Patents
Reaction type extra-high precision voltage source Download PDFInfo
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- CN103064456B CN103064456B CN201110325264.0A CN201110325264A CN103064456B CN 103064456 B CN103064456 B CN 103064456B CN 201110325264 A CN201110325264 A CN 201110325264A CN 103064456 B CN103064456 B CN 103064456B
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Abstract
The invention relates to a voltage source, in particular to a reaction type extra-high precision voltage source which excesses 1 parts per million (ppm). The reaction type extra-high precision voltage source comprises a high-consistency positive and negative power supply, a main digital-to-analog converter (DAC) and a closed loop analogue signal processing circuit. A positive voltage output end and a negative voltage output end of the high-consistency positive and negative power supply are both connected with the main DAC and an input end of the closed loop analogue signal processing circuit. An output end of the main DAC is connected with the other input end of the closed loop analogue signal processing circuit, and the high-consistency positive and negative power supply converts positive and negative voltage input externally into high-consistency positive and negative voltage and supplies electricity for the main DAC and the closed loop analogue signal processing circuit. The main DAC is a voltage output source of the whole voltage source, and external control signals drive the main DAC to output the voltage. The output voltage of the main DAC is processed by the closed loop analogue signal processing circuit, and thus final output high-precision voltage is obtained. The reaction type extra-high precision voltage source is simple in structure, low in cost, does not need calibrating or continuous monitoring, and is simple, and easy to use.
Description
Technical field
The present invention relates to a kind of voltage source, particularly a kind of super 1ppm feedback type ultra-high-precision voltage source.
Background technology
As time goes on, the development of semiconductor processes and sheet internal calibration technology, also constantly changes about the definition of accurate integrated circuit DAC.12 DAC of high precision had once been considered to out of reach; In recent years, 16 precision are found broad application day by day in accurate medical science, instrument and meter, test and metrology applications; Along with the development of control system and instrument system, more and more urgent to more high-precision voltage source demand.
Current voltage source system complex, need to be used multiple device, need to constantly calibrate, and precision is low, and volume is large, cost is high.
Summary of the invention
The object of the present invention is to provide a kind of feedback type ultra-high-precision voltage source, this voltage source is simple in structure, and cost is low, without calibration or lasting monitoring, is simple and easy to use.
Realize the technical scheme of the object of the invention: a kind of feedback type ultra-high-precision voltage source, it comprises high consistance positive-negative power, main DAC, closed-loop simulation signal processing circuit, and the positive voltage output end of high consistance positive-negative power is all connected with an input end of main DAC, closed-loop simulation signal processing circuit with negative voltage output terminal; The output terminal of main DAC is connected with another input end of closed-loop simulation signal processing circuit; High consistance positive-negative power is converted to high conforming generating positive and negative voltage to main DAC, the power supply of closed-loop simulation signal processing circuit the generating positive and negative voltage of outside input; Main DAC is the Voltage-output source of whole voltage source, and external control signal drives main DAC output voltage; Main DAC output voltage is final output high-accuracy voltage after closed-loop simulation signal processing circuit is processed.
Described closed-loop simulation signal processing circuit comprises analog signal processing circuit, analog adder and analogue buffer circuit, A/D transducer, MCU, from DAC, the output terminal of main DAC is connected with the input end of analog signal processing circuit, and the output terminal of analog signal processing circuit is connected with an input end of analog adder and analogue buffer circuit; The output terminal of analog adder and analogue buffer circuit is successively with A/D transducer, MCU, be connected from DAC; Be connected with another input end of analog adder and analogue buffer circuit from the output terminal of DAC; The positive voltage output end of high consistance positive-negative power and negative voltage output terminal are all with main DAC, be connected from an input end of DAC; Analog signal processing circuit in closed-loop simulation signal processing circuit strengthen main DAC output simulating signal signal to noise ratio (S/N ratio) and the simulating signal of main DAC output is amplified; In voltage signal input analog adder and analogue buffer circuit through analog signal processing circuit; The output voltage signal that is voltage source through the voltage signal of analog adder and analogue buffer processing of circuit; Gather the output voltage of totalizer and analogue buffer circuit by A/D transducer, change the analog voltage signal of totalizer and the output of analogue buffer circuit into digital voltage signal; The digital voltage signal of A/D transducer is exported to (MCU24), (MCU24) will after the digital signal processing of A/D transducer output, be input to from DAC and control from DAC output voltage signal; Analog adder and analogue buffer circuit, carry out analog addition computing with the simulating signal of analog signal processing circuit output from the voltage signal of DAC output, finally by analog adder and analogue buffer circuit by the high-precision analog voltage Buffer output carrying out after analog addition computing.
Described main DAC is also connected with the first operational amplifier, second operational amplifier with offset compensation circuit with offset compensation circuit, and described is also connected with the 3rd operational amplifier, the 4th operational amplifier with offset compensation circuit with offset compensation circuit from DAC; The operational amplifier that the operational amplifier that the first operational amplifier, second with offset compensation circuit has an offset compensation circuit has offset compensation circuit for the operational amplifier, the 4th that forms Voltage Feedback the 3rd at main DAC voltage input end and have offset compensation circuit forms Voltage Feedback for the voltage input end from DAC; The Vnin of operational amplifier holds from Vr reference voltage terminal according to positive voltage output end or the negative voltage output terminal of the high consistance positive and negative voltage sources of different connections of power requirement; Vpin end connects main DAC, feedback voltage end from DAC; The final first operational amplifier, second with offset compensation circuit has the operational amplifier of offset compensation circuit the voltage after migration is held to the voltage input end of output voltage to main DAC by VOUT; The 3rd operational amplifier, the 4th with offset compensation circuit has the operational amplifier of offset compensation circuit and holds output voltage to the voltage input end from DAC by VOUT the voltage after migration.
Operational amplifier, the 3rd positive input with the operational amplifier of offset compensation circuit that the positive voltage output end of described high consistance positive-negative power and second has offset compensation circuit are connected, and operational amplifier, the 4th positive input with the operational amplifier of offset compensation circuit that the negative voltage output terminal of high consistance positive-negative power and first has offset compensation circuit are connected; The first reverse input end, output terminal with the operational amplifier of offset compensation circuit is connected with an input end of main DAC, and the second reverse input end, output terminal with the operational amplifier of offset compensation circuit is all connected with another input end of main DAC.
The described operational amplifier with offset compensation circuit comprises the first operational amplifier and skew order wink circuit, the first operational amplifier is made up of a PMOS transistor, the 2nd PMOS transistor, the first nmos pass transistor, the second nmos pass transistor, the 4th nmos pass transistor, the first operational amplifier produces DC input offset, to the first operational amplifier input forward input signal Vpin, reverse input signal Vnin and bias voltage VBIAS, output signal VOUT; In the first operational amplifier, the deviation of the characteristic of a PMOS transistor and the transistorized characteristic of the 2nd PMOS and the first nmos pass transistor and the second nmos pass transistor is the reason that produces DC input offset; Skew order wink circuit is made up of the 3rd PMOS transistor, the 3rd nmos pass transistor, the first switch, second switch, the second amplifier and the 5th electric capacity, the 6th electric capacity; The 3rd PMOS transistor and the 3rd nmos pass transistor form offset detection level for detection of DC input offset.
Described analog signal processing circuit is made up of the 3rd operational amplifier, four-operational amplifier, the 5th operational amplifier, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, variable resistor and the 13 electric capacity, the 14 electric capacity, the 15 electric capacity, the 16 electric capacity; One end of the 3rd resistance, the 4th resistance provides simulating signal TP1, TN1; The other end of the 3rd resistance, the 4th resistance connects respectively reverse input end of the 3rd operational amplifier, four-operational amplifier; Between the lead-out terminal of above-mentioned the 3rd operational amplifier and reverse input end, be connected in parallel the 5th resistance and the 13 electric capacity, the positive input sub-connection of the 3rd operational amplifier is on reference voltage source; Between the lead-out terminal of above-mentioned four-operational amplifier and reverse input end, be connected in parallel variable resistor and the 14 electric capacity, the positive input sub-connection of four-operational amplifier is on reference voltage source VREF; On the lead-out terminal of above-mentioned the 3rd operational amplifier, four-operational amplifier, connect respectively one end of the 6th resistance, the 7th resistance, the other end of the 6th resistance, the 7th resistance is connected on positive input and reverse input end of the 5th operational amplifier; Resistance and electric capacity are connected in parallel between positive input of above-mentioned the 5th operational amplifier and reference voltage source; The 9th resistance and the 16 electric capacity are connected in parallel between the lead-out terminal of above-mentioned the 5th operational amplifier and reverse input end; The output signal of above-mentioned the 5th operational amplifier is provided for analog adder and output buffer.
Analog adder and output buffer comprise the 6th operational amplifier, the 13 resistance, the 14 resistance, the 15 resistance, the 17 electric capacity; The positive input sub-connection of above-mentioned the 6th operational amplifier, on reference voltage source, connects one end of the 13 resistance, the 15 resistance on reverse input end; The 13 resistance other end connects the output terminal from DAC, and the other end of the 15 resistance is connected on the lead-out terminal of above-mentioned the 6th operational amplifier; The 14 resistance and the 17 electric capacity are connected in parallel between the lead-out terminal of above-mentioned the 6th operational amplifier and reverse input end; The output signal of above-mentioned the 6th operational amplifier is provided for outside or other circuit as simulation output, and meanwhile, output signal is carried arch to A/D transducer.
Useful technique effect of the present invention: the present invention adopts DA-AD feedback thought, realizes high precision electro potential source by high precision DA, AD element.Circuit core forms a main DAC by two 20 figure place weighted-voltage D/A converters and its output of auxiliary DAC produces higher resolution after convergent-divergent and combination.Main DAC output is added with the auxiliary DAC output through decay, makes auxiliary DAC fill up the resolution gap between main DAC step-length.The present invention designs high consistance positive and negative voltage sources, and the generating positive and negative voltage of high consistance positive and negative voltage sources output has high following effect makes generating positive and negative voltage have very high consistance.When high consistance positive and negative voltage sources input DAC, can eliminate the inconsistent loss of significance causing of generating positive and negative voltage.Because DAC input voltage has feedback pin, the present invention has designed a kind of operational amplifier of offset compensation circuit, the operational amplifier of offset compensation circuit has offset compensation function, accept not produce after the input of high consistance positive and negative voltage sources output bigoted, and the feed back input that can accept DAC is realized the feedback voltage input of DAC.The present invention is feedback type ultra-high-precision voltage source, and feedback consists of ADC, analog adder output buffer 22 and analog attenuator 26.Feedback ADC gathers analog D AC output and is converted to digital signal,, is improved and simulates output accuracy with main DAC output stack from analog adder 23 is passed through in the simulation output of DAC to from DAC by digital processing post-compensation.DAC output after combination need to be only monotonicity, but the linearity is without high, because high-performance is to obtain by the constant voltage feedback of accurate analog to digital converter.Owing to adopting 1ppm DAC semiconductor processes device, the high consistance positive and negative voltage sources designing by the present invention, the operational amplifier of offset compensation circuit, feedback voltage resource loop make the voltage source precision of invention can be higher than 1ppm.
Brief description of the drawings
The system chart of a kind of feedback type ultra-high-precision voltage source that Fig. 1 carries for the present invention;
The circuit theory diagrams of the high consistance positive and negative voltage sources that Fig. 2 carries for the present invention;
The circuit theory diagrams of the operational amplifier with offset compensation circuit that Fig. 3 carries for the present invention;
The circuit theory diagrams of the DAC circuit based on AD5791 that Fig. 4 carries for the present invention;
The circuit theory diagrams of the closed-loop simulation signal processing circuit that Fig. 5 carries for the present invention.
In figure: 11 is power supply, 12 is main DAC, and 2 is closed-loop simulation signal processing circuit, and 21 is analog signal processing circuit, and 22 is analog adder and analogue buffer circuit, and 23 is A/D transducer, and 24 is MCU, and 25 is from DAC;
A1～A4 is the operational amplifier with offset compensation circuit;
13～16,18 is operational amplifier;
R1～R9 and R13～R15 are resistance;
RV is variable resistor;
C1～C17 is electric capacity.
L1 is inductance.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.
As shown in Figure 1, a kind of feedback type ultra-high-precision voltage source that the present invention carries comprises that operational amplifier A 1, second that high consistance positive-negative power 11, main DAC12, first have an offset compensation circuit has operational amplifier A 2, the closed-loop simulation signal processing circuit 2 of offset compensation circuit.Closed-loop simulation signal processing circuit 2 comprises: analog signal processing circuit 21, analog adder and analogue buffer circuit 22, A/D transducer 23, MCU24, the operational amplifier A 3, the 4th that has an offset compensation circuit from DAC25, the 3rd have the operational amplifier A 4 of offset compensation circuit.
As shown in Figure 1, the positive voltage output end V+ of high consistance positive-negative power 11 is connected with the positive input (+) of operational amplifier A 2, A3, and the negative voltage output terminal V-of high consistance positive-negative power 11 is connected with the positive input (+) of operational amplifier A 1, A4.Reverse input end (-), the output terminal of operational amplifier A 1 are connected with an input end of main DAC12, and reverse input end (-), the output terminal of operational amplifier A 2 are all connected with another input end of main DAC12.The output terminal of main DAC12 is connected with the input end of analog signal processing circuit 21, and the output terminal of analog signal processing circuit 21 is connected with an input end of analog adder and analogue buffer circuit 22.The output terminal of analog adder and analogue buffer circuit 22 is connected with the input end of A/D transducer 23, and the output terminal of A/D transducer 23 is connected with the input end of MCU24, MCU24 output terminal connect from input end of DAC25.Reverse input end (-), the output terminal of operational amplifier A 3 are connected with an input end from DAC25, and reverse input end (-), the output terminal of operational amplifier A 4 are all connected with another input end from DAC25.
As shown in Figure 1, high consistance positive-negative power 11 is for main DAC12, provides high consistance positive-negative power from DAC25, and high consistance positive-negative power 11 can reduce due to main DAC12, from the inconsistent DAC output accuracy loss causing of the positive and negative supply voltage of DAC25 chip.High consistance positive-negative power 11 is converted to high conforming generating positive and negative voltage to main DAC12, power from DAC25 the generating positive and negative voltage of outside input.Main DAC12 is the Voltage-output source of whole voltage source, and external control signal drives main DAC12 output voltage.Main DAC12 output voltage is final output high-accuracy voltage after closed-loop simulation signal processing circuit 2 is processed.Analog signal processing circuit 21 in closed-loop simulation signal processing circuit 2 strengthens the signal to noise ratio (S/N ratio) of the simulating signal of main DAC12 output, and analog signal processing circuit 21 can amplify the simulating signal of main DAC12 output.In voltage signal input analog adder and analogue buffer circuit 22 through analog signal processing circuit 21.The output voltage signal that the voltage signal that process analog adder and analogue buffer circuit 22 are processed is voltage source.Gather the output voltage of totalizer and analogue buffer circuit 22 by A/D transducer 23, the analog voltage signal that totalizer and analogue buffer circuit 22 are exported changes digital voltage signal into.The digital voltage signal of A/D transducer 23 is exported to MCU24, is input to from DAC25 and controls from DAC25 output voltage signal after the digital signal processing that MCU24 exports A/D transducer 23.Analog adder and analogue buffer circuit 22, carry out analog addition computing with the simulating signal that analog signal processing circuit 21 is exported from the voltage signal of DAC25 output, finally by analog adder and analogue buffer circuit 22 by the analog voltage Buffer output carrying out after analog addition computing.The high-accuracy voltage of the output that the analog voltage of analog adder and analogue buffer circuit 22 Buffer outputs is voltage source of the present invention.
Fig. 2 is the circuit diagram of a kind of high consistance positive and negative voltage sources 11 provided by the present invention.Because high precision DAC input voltage is generating positive and negative voltage.The consistance DAC output accuracy impact of generating positive and negative voltage is larger.Positive and negative voltage sources comprises voltage chip positive voltage chip 7810, negative voltage chip 7910, Voltage Feedback amplifier AD8065, the first divider resistance R1, the second divider resistance R2, the first filter capacitor C1, the second filter capacitor C2, the 3rd filter capacitor C3, the 4th filter capacitor C4.
The pin VIN connection+15V voltage source of positive voltage chip 7810, all be connected+10V of the pin VIN+ voltage source of the pin VOUT of positive voltage chip 7810 and Voltage Feedback amplifier AD8065, negative voltage chip 7910 pin VIN connection-15V voltage sources, be all connected-10V of the pin VIN-voltage source of the pin VOUT of negative voltage chip 7910 and Voltage Feedback amplifier AD8065.The pin GND of negative voltage chip 7910 is connected with the pin VOUT of Voltage Feedback amplifier AD8065.The first divider resistance R1 connects with the second divider resistance R2, and the first filter capacitor C1 connects with the second filter capacitor C2, and the 3rd filter capacitor C3 connects with the 4th filter capacitor C4, three circuit be connected in parallel on+10V voltage sources after series connection and-10V voltage source between.The first divider resistance R1 is connected with the pin IN-of Voltage Feedback amplifier AD8065 with the second divider resistance R2 center, the equal ground connection of the other end of the pin IN-of Voltage Feedback amplifier AD8065, the pin GND first divider resistance R1 of positive voltage chip 7810.
Positive voltage chip 7810, negative voltage chip 7910 output voltages are by the first divider resistance R1, the second divider resistance R2 dividing potential drop, and resistance R 1, R2 are that high-accuracy resistance and resistance equate.Voltage Feedback amplifier AD8065 carries out calculus of differences by R1, R2 center voltage with ground, and the GND end that the voltage difference between R1, R2 center voltage and ground outputs to negative voltage chip 7910 after amplifier AD8065 compensates formation voltage close loop circuit.Positive voltage+10V and the negative voltage-10V of the voltage close loop circuit output shown in Fig. 2 form voltage follow, and the magnitude of voltage height of generating positive and negative voltage is consistent.High consistance positive and negative voltage sources 11 is for main DAC12, provide generating positive and negative voltage from DAC25.Operational amplifier A 1～A4 that the generating positive and negative voltage of high consistance positive and negative voltage sources 11 is exported to offset compensation circuit is for main DAC12, provide high consistance voltage from DAC25.
The circuit of four operational amplifier A 1 with offset compensation circuit provided by the present invention, A2, A3, A4 is identical, and its circuit diagram as shown in Figure 3.The operational amplifier with offset compensation circuit comprises the first operational amplifier and skew order wink circuit.
The first operational amplifier is made up of a PMOS (P channel-type MOS) transistor MP1, the 2nd PMOS transistor MP2, a NMOS (N channel-type MOS) transistor MN1, the second nmos pass transistor MN2, the 4th nmos pass transistor MN4.The first operational amplifier produces DC input offset, to the first operational amplifier input forward input signal Vpin, reverse input signal Vnin and bias voltage VBIAS, output signal VOUT.In the first operational amplifier, the deviation of the characteristic of the characteristic of PMOS transistor MP1 and MP2 and nmos pass transistor MN1 and MN2 becomes the reason that produces DC input offset.
Skew order wink circuit is made up of the 3rd PMOS transistor MP3, the 3rd nmos pass transistor MN3, the first switch SW 1, second switch SW2, the second amplifier 13 and the 5th capacitor C 5, the 6th capacitor C 6.Transistor MP3 and MN3 form offset detection level for detection of DC input offset.
The action of this migration by two switch SW 1, SW2 being alternately connected to swA side according to copped wave clock and swB side realizes, that is, in the time that switch SW 1, SW2 are connected swA side, is inputted identical reverse input signal Vnin to transistor MN1 and MN3.And, control the rear grid of transistor MP1 by the second amplifier 13, so that the output level VOUT of transistor MP3 and MN3 becomes the level identical with reference voltage V r.In the time controlling end, the output level of transistor MP1 and MN1 becomes the reference voltage V r identical with the output level of transistor MP3 and MN3.
On the other hand, in the time that switch SW 1, SW2 are connected swB side, input identical forward input signal Vpin to transistor MN2 and MN3.And, control the rear grid of transistor MP2 so that the output level VOUT of transistor MP3 and MN3 becomes the level identical with reference voltage V r by the second amplifier 13.In the time controlling end, the output level of transistor MP2 and MN2 becomes the reference voltage V r identical with the output level VOUT of transistor MP3 and MN3.
By alternately repeating this two actions, the output level of the output level of transistor MP1 and MN1 and transistor MP2 and MN2 is controlled as identical reference voltage V r.The error voltage being produced by DC input offset is separately absorbed as the difference of the control voltage of the rear gate terminal of control transistor MP1 and MP2, and DC input offset is separately compensated.
And due in the not controlled situation of the rear gate terminal at transistor MP1 and MP2, rear gate terminal separately becomes high resistant Hangzhoupro state, therefore for retentive control voltage, and capacitor C5, C6 is set.C5 and C6 absorb copped wave clock generating switching noise.
Operational amplifier A 1～the A4 with offset compensation circuit shown in Fig. 3 is for main DAC12, from the voltage input end of DAC25, and the operational amplifier A 1～A4 with offset compensation circuit has minimum bigoted voltage.Voltage input end for high precision DAC forms Voltage Feedback.In Fig. 3 Vnin end from Vr reference voltage terminal according to positive voltage output end or the negative voltage output terminal of the high consistance positive and negative voltage sources 11 of different connections of power requirement, the main DAC12 of Vpin end connection, from the feedback voltage end of DAC25.Operational amplifier A 1～the A4 of final offset compensation circuit gives main DAC12, voltage input end from DAC25 by VOUT end output voltage.
Fig. 4 is the circuit of DAC of the present invention.DAC adopts the high precision DAC chip AD5791 of 20bit.DAC output circuit is made up of the operational amplifier A with offset compensation circuit 1 in Fig. 3, A2, inductance L 1, the 7th capacitor C 7, the 8th capacitor C 8, the 9th capacitor C 9, the tenth capacitor C the 10, the 11 capacitor C the 11, the 12 capacitor C 12.
The pin VREFPS of high precision DA chip AD5791 is connected with the reverse input end (-) of operational amplifier A 1, the pin VREFPF of high precision DA chip AD5791 is connected with the output terminal of operational amplifier A 1, high consistance positive-negative power 11+10V voltage output end is connected with the positive input (+) of operational amplifier A 1.One end of the 7th capacitor C 7, one end common ground of the 8th capacitor C 8, the other end of the 7th capacitor C 7 is connected with the pin IOVcc of chip AD5791, one end of the other end of the 8th capacitor C 8 and inductance L 1 is all connected with the pin Vcc of chip AD5791, and the other end of inductance L 1 connects 3.3V voltage source.After the 11 capacitor C the 11, the 12 capacitor C 12 is in parallel, one end is connected with the pin VDD of AD5791, another termination voltage source V DD, also ground connection of the 11 capacitor C the 11, the 12 capacitor C 12.The pin VREFNS of high precision DA chip AD5791 is connected with the reverse input end (-) of operational amplifier A 2, the pin VREFNF of high precision DA chip AD5791 is connected with the output terminal of operational amplifier A 2, high consistance positive-negative power 11-10V voltage output end is connected with the positive input (+) of operational amplifier A 2.The 19 capacitor C 9, the tenth capacitor C 10 rear one end in parallel are connected with the pin VSS of AD5791, the 19 capacitor C 9, the tenth capacitor C 10 other end ground connection.
The digital quantity of SPI input is converted to analog voltage output by DAC chip AD5791 by digital quantity.In Fig. 4, A1, A2 are the operational amplifier with offset compensation circuit, and VREFPF, the VREFPS of operational amplifier A 1, A2 and AD5791, VREFNF, VREFNS pin form input voltage feedback, reduce the impact of input voltage on high precision DAC precision.DAC has twice application in voltage source of the present invention, and wherein the control signal of main DAC12 input is outside control signal, controls the size of whole voltage source output voltage.Be the digital voltage compensating signal of processing by MCU24 from the input signal of DAC25, output analog voltage from DAC25 accepts input.After the simulating signal that DAC25 output voltage signal is exported with analog signal processing circuit 21 in analog adder and analogue buffer circuit 22 is carried out analog addition computing finally by analog adder and analogue buffer circuit 22 by the analog voltage Buffer output carrying out after analog addition computing.
Fig. 5 is the circuit theory diagrams for closed-loop simulation signal processing circuit 2 of the present invention.Closed-loop simulation signal processing circuit 2 wraps analog signal processing circuit 21, analog adder and analogue buffer circuit 22, A/D transducer 23, MCU24, from DAC25.
Analog signal processing circuit 21 is made up of the 3rd operational amplifier 14, four-operational amplifier 15, the 5th operational amplifier 16, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, variable resistor RV and the 13 capacitor C the 13, the 14 capacitor C the 14, the 15 capacitor C the 15, the 16 capacitor C the 16, the 17 capacitor C 17.One end to above-mentioned resistance R 3, R4 provides simulating signal TP1, TN1.Reverse input end (-) of difference concatenation operation amplifier 14,15 on the other end of resistance R 3, R4.Resistance R 5 and capacitor C 13 are connected in parallel between the lead-out terminal of above-mentioned operational amplifier 14 and reverse input end (-), positive input (+) is connected on reference voltage source VREF (supply voltage VDD/2 level conventionally).Between the lead-out terminal of above-mentioned operational amplifier 15 and reverse input end (-), be connected in parallel variable resistor RV and capacitor C 14, positive input (+) is connected on reference voltage source VREF.One end of difference contact resistance R6, R7 on the lead-out terminal of above-mentioned operational amplifier 14,15, the other end of resistance R 6, R7 is connected on positive input (+) and reverse input end (-) of operational amplifier 16.Resistance R 8 and capacitor C 15 are connected in parallel between positive input (+) of above-mentioned operational amplifier 16 and reference voltage source VREF.And resistance R 9 and capacitor C 16 are connected in parallel between the lead-out terminal of above-mentioned operational amplifier 16 and reverse input end (-).And the output signal of above-mentioned operational amplifier 16 is provided for analog adder and output buffer 22.
Above-mentioned analog adder and output buffer 22 comprise the 6th operational amplifier the 18, the 13 resistance R the 13, the 14 resistance R the 14, the 15 resistance R the 15 and the 17 capacitor C 17.Positive input (+) of above-mentioned operational amplifier 18 is connected on reference voltage source VRE F, in one end of upper contact resistance R13, R15 of reverse input end (-).The other end of resistance R 15 is connected on the lead-out terminal of above-mentioned operational amplifier 16.And resistance R 14 and capacitor C 17 are connected in parallel between the lead-out terminal of above-mentioned operational amplifier 18 and reverse input end (-).And the output signal of above-mentioned operational amplifier 18 is provided for outside or other circuit as simulation output, meanwhile, carry arch to A/D transducer 23.The data of A/D transducer 23 pass to D/A transducer 25 by data after MCU24 processes.
In the circuit shown in Fig. 5, analog adder and output buffer 22 become opposite polarity impact damper, and its gain is decided by resistance R 13 and the ratio of the resistance value of R14, and its gain is: Ko=-R14/R13.And, the output terminal of resistance R 15 and resistance R 13 difference connecting analog signal processing circuits 21 and the output terminal from DAC25, by the signal plus of two output terminals, now analog adder and output buffer 22 are worked with analog adder state.
And, the gain Km=-R14/R15 of the output buffer of the output signal institute input side of analog signal processing circuit 21.The gain Km of the gain Ko of migration side and the outgoing side of analog signal processing circuit 21 needs not be identical.Can obtain the Voltage-output of different amplification by adjusting Km and Ko.
The TNI end ground connection of closed-loop simulation signal processing circuit 2, TPI connects the analog voltage of main DAC12 output.The output terminal of closed-loop simulation signal processing circuit 2 is the high-accuracy voltage of the bright output of this law.
According to above-mentioned such formation, owing to using operational amplifier to reduce the complexity of circuit.
In conjunction with the accompanying drawings and embodiments the present invention is explained in detail above, but the present invention is not limited to above-described embodiment, in the ken possessing those of ordinary skill in the art, can also under the prerequisite that does not depart from aim of the present invention, makes various variations.The content not being described in detail in the present invention all can adopt prior art.
Claims (6)
1. a feedback type ultra-high-precision voltage source, it is characterized in that: it comprises high consistance positive-negative power (11), main DAC (12), closed-loop simulation signal processing circuit (2), the positive voltage output end of high consistance positive-negative power (11) is all connected with an input end of main DAC (12), closed-loop simulation signal processing circuit (2) with negative voltage output terminal; The output terminal of main DAC (12) is connected with another input end of closed-loop simulation signal processing circuit (2); High consistance positive-negative power (11) is converted to high conforming generating positive and negative voltage to main DAC (12), closed-loop simulation signal processing circuit (2) power supply the generating positive and negative voltage of outside input; Main DAC (12) is the Voltage-output source of whole voltage source, and external control signal drives main DAC (12) output voltage; Main DAC (12) output voltage is final output high-accuracy voltage after closed-loop simulation signal processing circuit (2) is processed;
Described closed-loop simulation signal processing circuit (2) comprises analog signal processing circuit (21), analog adder and analogue buffer circuit (22), A/D transducer (23), MCU (24), from DAC (25), the output terminal of main DAC (12) is connected with the input end of analog signal processing circuit (21), and the output terminal of analog signal processing circuit (21) is connected with an input end of analog adder and analogue buffer circuit (22); The output terminal of analog adder and analogue buffer circuit (22) is successively with A/D transducer (23), MCU (24), be connected from DAC (25); Be connected with another input end of analog adder and analogue buffer circuit (22) from the output terminal of DAC (25); The positive voltage output end of high consistance positive-negative power (11) and negative voltage output terminal are all with main DAC (12), be connected from an input end of DAC (25); Analog signal processing circuit (21) in closed-loop simulation signal processing circuit (2) strengthen main DAC (12) output simulating signal signal to noise ratio (S/N ratio) and the simulating signal of main DAC (12) output is amplified; In voltage signal input analog adder and analogue buffer circuit (22) through analog signal processing circuit (21); The output voltage signal that is voltage source through the voltage signal of analog adder and analogue buffer circuit (22) processing; Gather the output voltage of totalizer and analogue buffer circuit (22) by A/D transducer (23), change the analog voltage signal of totalizer and analogue buffer circuit (22) output into digital voltage signal; The digital voltage signal of A/D transducer (23) is exported to MCU (24), and MCU (24) will be input to from DAC (25) and control from DAC (25) output voltage signal after the digital signal processing of A/D transducer (23) output; Analog adder and analogue buffer circuit (22), carry out analog addition computing with the simulating signal of analog signal processing circuit (21) output from the voltage signal of DAC (25) output, finally by analog adder and analogue buffer circuit (22) by the high-precision analog voltage Buffer output carrying out after analog addition computing.
2. a kind of feedback type ultra-high-precision voltage source according to claim 1, it is characterized in that: the operational amplifier (A2) that described main DAC (12) also has an offset compensation circuit with the first operational amplifier (A1), second with offset compensation circuit is connected, the described operational amplifier (A4) that also has an offset compensation circuit with the 3rd operational amplifier (A3), the 4th with offset compensation circuit from DAC (25) is connected; The first operational amplifier (A1), second with offset compensation circuit has the operational amplifier (A2) of offset compensation circuit for forming Voltage Feedback at main DAC (12) voltage input end; The operational amplifier (A4) that the 3rd operational amplifier (A3), the 4th with offset compensation circuit has offset compensation circuit forms Voltage Feedback for the voltage input end from DAC (25); The Vnin of operational amplifier (A1), (A2), (A3), (A4) holds from Vr reference voltage terminal according to the positive voltage output end of the high consistance positive and negative voltage sources of the different connections of power requirement (11) or negative voltage output terminal; Vpin end connects main DAC (12), feedback voltage end from DAC (25); The final first operational amplifier (A1), second with offset compensation circuit has the operational amplifier (A2) of offset compensation circuit the voltage after migration is held to the voltage input end of output voltage to main DAC (12) by VOUT; The 3rd operational amplifier (A3), the 4th with offset compensation circuit has the operational amplifier (A4) of offset compensation circuit and holds output voltage to the voltage input end from DAC (25) by VOUT the voltage after migration.
3. a kind of feedback type ultra-high-precision voltage source according to claim 2, it is characterized in that: the positive input that the operational amplifier (A2), the 3rd that the positive voltage output end and second of described high consistance positive-negative power (11) has an offset compensation circuit has the operational amplifier (A3) of offset compensation circuit is connected, the positive input that the operational amplifier (A1), the 4th that the negative voltage output terminal of high consistance positive-negative power (11) and first has an offset compensation circuit has the operational amplifier (A4) of offset compensation circuit is connected; The first reverse input end, output terminal with the operational amplifier (A1) of offset compensation circuit is connected with an input end of main DAC (12), and the second reverse input end, output terminal with the operational amplifier of offset compensation circuit is all connected with another input end of main DAC (12).
4. a kind of feedback type ultra-high-precision voltage source according to claim 3, it is characterized in that: the described operational amplifier with offset compensation circuit comprises the first operational amplifier and skew order wink circuit, the first operational amplifier is by a PMOS transistor (MP1), the 2nd PMOS transistor (MP2), the first nmos pass transistor (MN1), the second nmos pass transistor (MN2), the 4th nmos pass transistor (MN4) composition, the first operational amplifier produces DC input offset, to the first operational amplifier input forward input signal Vpin, oppositely input signal Vnin and bias voltage VBIAS, output signal VOUT, in the first operational amplifier, the deviation of the characteristic of the characteristic of a PMOS transistor (MP1) and the 2nd PMOS transistor (MP2) and the first nmos pass transistor (MN1) and the second nmos pass transistor (MN2) is the reason that produces DC input offset, skew order wink circuit is made up of the 3rd PMOS transistor (MP3), the 3rd nmos pass transistor (MN3), the first switch (SW1), second switch (SW2), the second amplifier (13) and the 5th electric capacity (C5), the 6th electric capacity (C6), the 3rd PMOS transistor (MP3) and the 3rd nmos pass transistor (MN3) form offset detection level for detection of DC input offset.
5. a kind of feedback type ultra-high-precision voltage source according to claim 4, it is characterized in that: described analog signal processing circuit (21) is by the 3rd operational amplifier (14), four-operational amplifier (15), the 5th operational amplifier (16), the 3rd resistance (R3), the 4th resistance (R4), the 5th resistance (R5), the 6th resistance (R6), the 7th resistance (R7), the 8th resistance (R8), the 9th resistance (R9), variable resistor (RV) and the 13 electric capacity (C13), the 14 electric capacity (C14), the 15 electric capacity (C15), the 16 electric capacity (C16) forms, one end of the 3rd resistance (R3), the 4th resistance (R4) provides simulating signal TP1, TN1, the other end of the 3rd resistance (R3), the 4th resistance (R4) connects respectively reverse input end of the 3rd operational amplifier (14), four-operational amplifier (15), between the lead-out terminal of above-mentioned the 3rd operational amplifier (14) and reverse input end, be connected in parallel the 5th resistance (R5) and the 13 electric capacity (C13), the positive input sub-connection of the 3rd operational amplifier (14) is on reference voltage source (VREF), between the lead-out terminal of above-mentioned four-operational amplifier (15) and reverse input end, be connected in parallel variable resistor (RV) and the 14 electric capacity (C14), the positive input sub-connection of four-operational amplifier (15) is on reference voltage source VREF, on the lead-out terminal of above-mentioned the 3rd operational amplifier (14), four-operational amplifier (15), connect respectively one end of the 6th resistance (R6), the 7th resistance (R7), the other end of the 6th resistance (R6), the 7th resistance (R7) is connected on positive input and reverse input end of the 5th operational amplifier (16), resistance (R8) and electric capacity (C15) are connected in parallel between positive input of above-mentioned the 5th operational amplifier (16) and reference voltage source (VREF), the 9th resistance (R9) and the 16 electric capacity (C16) are connected in parallel between the lead-out terminal of above-mentioned the 5th operational amplifier (16) and reverse input end, the output signal of above-mentioned the 5th operational amplifier (16) is provided for analog adder and output buffer (22).
6. a kind of feedback type ultra-high-precision voltage source according to claim 5, is characterized in that: described analog adder and output buffer (22) comprise the 6th operational amplifier (18), the 13 resistance (R13), the 14 resistance (R14), the 15 resistance (R15), the 17 electric capacity (C17); The positive input sub-connection of above-mentioned the 6th operational amplifier (18) is upper at reference voltage source (VREF), in the upper one end that connects the 13 resistance (R13), the 15 resistance (R15) of reverse input end (-); The other end of the 13 resistance (R13) connects the output terminal from DAC (25), and the other end of the 15 resistance (R15) is connected on the lead-out terminal of above-mentioned the 6th operational amplifier (16); The 14 resistance (R14) and the 17 electric capacity (C17) are connected in parallel between the lead-out terminal of above-mentioned the 6th operational amplifier (18) and reverse input end; The output signal of above-mentioned the 6th operational amplifier (18) is provided for outside or other circuit as simulation output, and meanwhile, output signal is carried arch to A/D transducer (23).
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| CN109245529B (en) * | 2018-10-24 | 2019-12-17 | 广州金升阳科技有限公司 | positive and negative voltage output power supply circuit |
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