CN102904709B - Method for automatically switching four Chen type system based fractional order chaotic systems and analog circuit - Google Patents

Abstract

The invention discloses a method for automatically switching four Chen type system based fractional order chaotic systems and an analog circuit. The analog circuit is composed of an operational amplifier U1, an operational amplifier U2, an operational amplifier U3, an operational amplifier U5, an operational amplifier U8, a multiplier U4, a multiplier U9, a multiplier U10, a voltage comparator U7 and an analogue switch U6. The analog circuit is used for achieving the fractional order chaotic systems with four Chen type subsystems which are automatically switched, the fractional order chaotic systems are more complicated and higher in randomness than automatic switching chaotic systems which are composed of 2 or 3 sub-chaotic systems and non-switching fractional order chaotic systems, and the fractional order automatic switching chaotic systems can be a new choice of a signal source of secret communication and have good application prospects in the secret communication.

Description

Based on fractional order four systems automatically switched chaotic system method and the analog circuit of Chen type system

Technical field

The present invention relates to the method for the fractional order four systems automatically switched chaotic system based on Chen type system, specifically, relate to the method based on the fractional order four systems automatically switched chaotic system of Chen type system and analog circuit.

Background technology

At present, oneself has multiple method analog circuit to realize integer rank and chaotic systems with fractional order and circuit, but the Measures compare realizing the chaos circuit automatically switched with analog circuit is few, and oneself disclosed automatically switched chaotic system and circuit are that the sub-chaos system in 2, integer rank switches, disclosing of the method also not having multiple sub-chaos system to automatically switch and circuit, the invention provides method and the analog circuit of the chaos system that a kind of Chen type fractional order four systems automatically switches, quantity and the type of automatically switched chaotic system are enriched, improve the randomness of chaos system, good application prospect is had in secure communication.

Summary of the invention

The technical problem to be solved in the present invention is to provide method based on the fractional order four systems automatically switched chaotic system of Chen type system and analog circuit.

The present invention adopts following technological means to realize goal of the invention:

1, based on the method for the fractional order four systems automatically switched chaotic system of Chen type system, it is characterized in that being, comprise the following steps:

(1) according to Chen type chaos system I be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|x\right|-\mathrm{bz}\end{array}\right.---I$ a＝35,b＝3,c＝28

(2) according to Chen type chaos system II be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|y\right|-\mathrm{bz}\end{array}\right.---\mathrm{II}$ a＝35,b＝3,c＝28

(3) according to chaos system structure sign function III and IV be:

$\mathrm{sign}\left(x\right)=\left\{\begin{array}{cc}1& x\&GreaterEqual;0\\ -1& x<0\end{array}\right.---\mathrm{III}$

$\mathrm{sign}\left(x\right)=\left\{\begin{array}{cc}1& y\&GreaterEqual;0\\ -1& y<0\end{array}\right.---\mathrm{IV}$

(4) according to Chen type chaos system V be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xsign}\left(y\right)-\mathrm{bz}\end{array}\right.---V$ a＝35,b＝3,c＝28

(5) according to Chen type chaos system VI be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{ysign}\left(x\right)-\mathrm{bz}\end{array}\right.---\mathrm{VI}$ a＝35,b＝3,c＝28

(6) according to chaos system structure choice function VII be:

$f\left(\mathrm{xy}\right)=\left\{\begin{array}{cc}\left|x\right|& x\&GreaterEqual;0,y\&GreaterEqual;0\\ \mathrm{xsign}\left(y\right)& x\&GreaterEqual;0,y<0\\ \mathrm{ysign}\left(x\right)& x<0,y\&GreaterEqual;0\\ \left|y\right|& x<0,y<0\end{array}\right.---\mathrm{VII}$

(7) a Chen type four systems automatically switched chaotic system IX is constructed according to system I, II, V, VI and choice function VII

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=f\left(\mathrm{xy}\right)-\mathrm{bz}\end{array}\right.---\mathrm{IX}$ a＝35,b＝3,c＝28

(8) a Chen type fractional order four systems automatically switched chaotic system X is constructed according to system IX

$\left\{\begin{array}{c}{d}^{q}x/{\mathrm{dt}}^q=a(y-x)\\ d^{q}y/{\mathrm{dt}}^q=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ d^{q}z/{\mathrm{dt}}^q=f\left(\mathrm{xy}\right)-\mathrm{bz}\end{array}\right.---X$ 0<q<1,a＝35,b＝3,c＝28

(9) according to chaos system X constructing analog Circuits System, voltage comparator U7 is utilized to obtain the low and high level of two simulations, x>=0 or x<0 and y>=0 or y<0, as the control inputs of analog switch U6, according to x>=0, y>=0, x>=0, y<0, x<0, y>=0 and x<0, y<0 tetra-kinds of different situations, the difference realizing f (xy) exports, thus realize the chaos system IX of four systems automatic switchover, chaos system X is realized again by fractional order integration, operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 adopts LF347, multiplier U4, multiplier U9, multiplier U10 adopts AD633JN, analog switch U6 adopts ADG409, voltage comparator U7 adopts LM139,

1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance Rx, connected with the 6th pin by resistance R1, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc11 of 6th pin is in parallel with electric capacity C11's, connecting resistance Rc12 and electric capacity C12's is in parallel again, connecting resistance Rc13 and electric capacity C13 again in parallel after connect the 7th pin, 7th pin connects the 13rd pin by resistance R13, connect the 1st pin of U4, the 2nd pin of U5 is connect by resistance Ra1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, 8th pin connects the 9th pin by resistance R25, 13rd pin connects the 14th pin by resistance R14, 14th pin connects the 2nd pin by potentiometer R11, the 2nd pin of U2 is connect by potentiometer R22,

1st pin of described operational amplifier U2 is connected with the 2nd pin by resistance Ry, connected with the 6th pin by resistance R2, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc21 of 6th pin is in parallel with electric capacity C21's, connect the in parallel of Rc22 and electric capacity C22 again, connect again Rc23 and electric capacity C23 in parallel after connect the 7th pin, 7th pin is connected with the 2nd pin by potentiometer R23, the 9th pin of U1 is connect by resistance R24, the 2nd pin of U1 is connect by potentiometer R12, the 13rd pin of U5 is connect by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, 8th pin connects the 13rd pin by resistance R33, first connect the in parallel of Rc31 and electric capacity C31, connect the in parallel of Rc32 and electric capacity C32 again, connecting resistance Rc33 and electric capacity C33 again in parallel after connect the 9th pin, 13rd pin connects the 14th pin by resistance R34, 14th pin connects the 2nd pin of U3 by potentiometer R32, connect the 3rd pin of U4,

Described operational amplifier U3 the 1st pin is connected with the 2nd pin by resistance Rz, connected by the 9th pin of resistance R3 and U2, U3 the 2nd pin connects 14 pins of U2 by R32,3rd pin ground connection, 4th pin meets VCC, 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin completes overpotential device R21 connects the 2nd pin of U2, and the 8th pin meets VCC;

1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, 2nd pin connects the 7th pin of U1 by resistance Ra1, by series connection the 1st pin of resistance Ra2 and diode D4, by series connection the 6th pin of resistance Ra1 and resistance Ra5, by series connection the 6th pin of resistance Ra2 and Ra3, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin connects positive 14V power supply, 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Ra4, 7th pin connects the 7th pin of U6, 8th pin connects the 5th pin of U6, the 9th pin is connect by resistance Ra9, 9th pin is by series connection the 14th pin of resistance Ra8 and diode D6, by series connection the 13rd pin of resistance Ra10 and Ra6, 13rd pin is by series connection the 14th pin of resistance Ra7 and diode D6, 14th pin connects the 13rd pin by diode D5,

1st pin of described analog switch U6 connects the 2nd pin of U7, and the 2nd pin, the 14th pin connect positive 14V power supply, and the 3rd pin connects negative 14V power supply, 4th pin connects the 7th pin of U10, and the 5th pin connects the 8th pin of U5, and the 6th pin connects the 7th pin of U9,7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, the 9th pin, 10th pin, 11st pin, the 12nd pin, the 13rd pin is unsettled, 15th pin ground connection, the 16th pin connects the 13rd pin of U7;

1st pin of described voltage comparator U7, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 14th pin are unsettled, 3rd pin meets VCC, 4th pin, the 10th pin, the 12nd pin, 2nd pin connects positive 14V power supply by resistance R01, by the series connection ground connection of diode D1 and resistance R02,13rd pin connects positive 14V power supply by resistance R03, by the series connection ground connection of diode D2 and resistance R04;

1st pin of described operational amplifier U8 connects the 6th pin by resistance Rs1,2nd pin connects the 7th pin of U1,3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin connects positive 14V power supply, and the 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Rs2,7th pin connects the 3rd pin of U10, and the 8th pin connects the 3rd pin of U9, connects the 9th pin by Rs4,9th pin connects the 14th pin by resistance Rs3, and the 13rd pin connects the 7th pin of U2;

1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 4th pin of U6, and the 8th pin meets VCC.

2, based on the fractional order four systems automatic switchover analog circuit of Chen type system, it is characterized in that being, by operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 and multiplier U4, multiplier U9, multiplier U10 and voltage comparator U7 and analog switch U6 forms, described operational amplifier U1 connects voltage comparator U7, operational amplifier U5, operational amplifier U8, multiplier U4, operational amplifier U2, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U5, voltage comparator U7, operational amplifier U8, described operational amplifier U3 concatenation operation amplifier U2, multiplier U4, described operational amplifier U5 connecting analog switch U6, described voltage comparator U7 connecting analog switch U6, described operational amplifier U8 concatenation operation amplifier U5, multiplier U9, multiplier U10, described multiplier U9 connecting analog switch U6, described multiplier U10 connecting analog switch U6,

1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance Rx, connected with the 6th pin by resistance R1, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc11 of 6th pin is in parallel with electric capacity C11's, connecting resistance Rc12 and electric capacity C12's is in parallel again, connecting resistance Rc13 and electric capacity C13 again in parallel after connect the 7th pin, 7th pin connects the 13rd pin by resistance R13, connect the 1st pin of U4, the 2nd pin of U5 is connect by resistance Ra1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, 8th pin connects the 9th pin by resistance R25, 13rd pin connects the 14th pin by resistance R14, 14th pin connects the 2nd pin by potentiometer R11, the 2nd pin of U2 is connect by potentiometer R22,

1st pin of described operational amplifier U2 is connected with the 2nd pin by resistance Ry, connected with the 6th pin by resistance R2, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc21 of 6th pin is in parallel with electric capacity C21's, connect the in parallel of Rc22 and electric capacity C22 again, connect again Rc23 and electric capacity C23 in parallel after connect the 7th pin, 7th pin is connected with the 2nd pin by potentiometer R23, the 9th pin of U1 is connect by resistance R24, the 2nd pin of U1 is connect by potentiometer R12, the 11st pin of U5 is connect by Ra6, connect the 13rd pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, 8th pin connects the 13rd pin by resistance R33, first connect the in parallel of Rc31 and electric capacity C31, connect the in parallel of Rc32 and electric capacity C32 again, connecting resistance Rc33 and electric capacity C33 again in parallel after connect the 9th pin, 13rd pin connects the 14th pin by resistance R34, 14th pin connects the 2nd pin of U3 by potentiometer R32, connect the 3rd pin of U4,

Described operational amplifier U3 the 1st pin is connected with the 2nd pin by resistance Rz, connected by the 9th pin of resistance R3 and U2, U3 the 2nd pin connects 14 pins of U2 by R32,3rd pin ground connection, 4th pin meets VCC, 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin completes overpotential device R21 connects the 2nd pin of U2, and the 8th pin meets VCC;

1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, 2nd pin connects the 7th pin of U1 by resistance Ra1, by series connection the 1st pin of resistance Ra2 and diode D4, by series connection the 6th pin of resistance Ra1 and resistance Ra5, by series connection the 6th pin of resistance Ra2 and Ra3, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin connects positive 14V power supply, 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Ra4, 7th pin connects the 7th pin of U6, 8th pin connects the 5th pin of U6, the 9th pin is connect by resistance Ra9, 9th pin is by series connection the 14th pin of resistance Ra8 and diode D6, by series connection the 13rd pin of Ra10 and Ra6, 13rd pin is by series connection the 14th pin of resistance Ra7 and diode D6, 14th pin connects the 13rd pin by diode D5,

1st pin of described analog switch U6 connects the 2nd pin of U7, and the 2nd pin, the 14th pin connect positive 14V power supply, and the 3rd pin connects negative 14V power supply, 4th pin connects the 7th pin of U10, and the 5th pin connects the 8th pin of U5, and the 6th pin connects the 7th pin of U9,7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, the 9th pin, 10th pin, 11st pin, the 12nd pin, the 13rd pin is unsettled, 15th pin ground connection, the 16th pin connects the 13rd pin of U7;

1st pin of described voltage comparator U7, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 14th pin are unsettled, 3rd pin meets VCC, 4th draws limb, the 10th pin, the 12nd pin ground connection, 2nd pin connects positive 14V power supply by resistance R01, by the series connection ground connection of diode D1 and resistance R02,13rd pin connects positive 14V power supply by resistance R03, by the series connection ground connection of diode D2 and resistance R04;

1st pin of described operational amplifier U8 connects the 6th pin by resistance Rs1,2nd pin connects the 7th pin of U1,3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin connects positive 14V power supply, and the 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Rs2,7th pin connects the 3rd pin of U10, and the 8th pin connects the 3rd pin of U9, connects the 9th pin by Rs4,9th pin connects the 14th pin by resistance Rs3, and the 13rd pin connects the 7th pin of U2;

1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 4th pin of U6, and the 8th pin meets VCC.

Accompanying drawing explanation

Fig. 1 is the circuit connection structure schematic diagram of the preferred embodiment of the present invention.

Fig. 2 is operational amplifier U1 peripheral circuit structural representation.

Fig. 3 is operational amplifier U2 and multiplier U4 peripheral circuit structural representation.

Fig. 4 is operational amplifier U5 peripheral circuit structural representation.

Fig. 5 is operational amplifier U8, multiplier U9 and multiplier U10 peripheral circuit structural representation.

Fig. 6 is the peripheral circuit structural representation of operational amplifier U3, voltage comparator U7 and analog switch U6.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment, the present invention is further described in detail.

See Fig. 1-Fig. 6, first construct Chen type fractional order four systems automatically switched chaotic system, the system that this preferred embodiment is selected

(1) according to Chen type chaos system I be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|x\right|-\mathrm{bz}\end{array}\right.---I$ a＝35,b＝3,c＝28

(2) according to Chen type chaos system II be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|y\right|-\mathrm{bz}\end{array}\right.---\mathrm{II}$ a＝35,b＝3,c＝28

(3) according to chaos system structure sign function III and IV be:

$\mathrm{sign}\left(x\right)=\left\{\begin{array}{cc}1& x\&GreaterEqual;0\\ -1& x<0\end{array}\right.---\mathrm{III}$

$\mathrm{sign}\left(x\right)=\left\{\begin{array}{cc}1& y\&GreaterEqual;0\\ -1& y<0\end{array}\right.---\mathrm{IV}$

(4) according to Chen type chaos system V be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xsign}\left(y\right)-\mathrm{bz}\end{array}\right.---V$ a＝35,b＝3,c＝28

(5) according to Chen type chaos system VI be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{ysign}\left(x\right)-\mathrm{bz}\end{array}\right.---\mathrm{VI}$ a＝35,b＝3,c＝28

(6) according to chaos system structure choice function VII be:

$f\left(\mathrm{xy}\right)=\left\{\begin{array}{cc}\left|x\right|& x\&GreaterEqual;0,y\&GreaterEqual;0\\ \mathrm{xsign}\left(y\right)& x\&GreaterEqual;0,y<0\\ \mathrm{ysign}\left(x\right)& x<0,y\&GreaterEqual;0\\ \left|y\right|& x<0,y<0\end{array}\right.---\mathrm{VII}$

(7) a Chen type four systems automatically switched chaotic system IX is constructed according to system I, II, V, VI and choice function VII

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=f\left(\mathrm{xy}\right)-\mathrm{bz}\end{array}\right.---\mathrm{IX}$ a＝35,b＝3,c＝28

(8) a Chen type fractional order four systems automatically switched chaotic system X is constructed according to system IX

$\left\{\begin{array}{c}{d}^{q}x/{\mathrm{dt}}^q=a(y-x)\\ d^{q}y/{\mathrm{dt}}^q=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ d^{q}z/{\mathrm{dt}}^q=f\left(\mathrm{xy}\right)-\mathrm{bz}\end{array}\right.---X$ 0<q<1,a＝35,b＝3,c＝28

(9) according to chaos system X constructing analog Circuits System, voltage comparator U7 is utilized to obtain the low and high level of two simulations, x>=0 or x<0 and y>=0 or y<0, as the control inputs of analog switch U6, according to x>=0, y>=0, x>=0, y<0, x<0, y>=0 and x<0, y<0 tetra-kinds of different situations, the difference realizing f (xy) exports, thus realize the chaos system IX of four systems automatic switchover, chaos system X is realized again by fractional order integration, operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 adopts LF347, multiplier U4, multiplier U9, multiplier U10 adopts AD633JN, analog switch U6 adopts ADG409, voltage comparator U7 adopts LM139,

1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance Rx, connected with the 6th pin by resistance R1, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc11 of 6th pin is in parallel with electric capacity C11's, connecting resistance Rc12 and electric capacity C12's is in parallel again, connecting resistance Rc13 and electric capacity C13 again in parallel after connect the 7th pin, 7th pin connects the 13rd pin by resistance R13, connect the 1st pin of U4, the 2nd pin of U5 is connect by resistance Ra1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, 8th pin connects the 9th pin by resistance R25, 13rd pin connects the 14th pin by resistance R14, 14th pin connects the 2nd pin by potentiometer R11, the 2nd pin of U2 is connect by potentiometer R22,

1st pin of described operational amplifier U2 is connected with the 2nd pin by resistance Ry, connected with the 6th pin by resistance R2, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc21 of 6th pin is in parallel with electric capacity C21's, connect the in parallel of Rc22 and electric capacity C22 again, connect again Rc23 and electric capacity C23 in parallel after connect the 7th pin, 7th pin is connected with the 2nd pin by potentiometer R23, the 9th pin of U1 is connect by resistance R24, the 2nd pin of U1 is connect by potentiometer R12, the 13rd pin of U5 is connect by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, 8th pin connects the 13rd pin by resistance R33, first connect the in parallel of Rc31 and electric capacity C31, connect the in parallel of Rc32 and electric capacity C32 again, connecting resistance Rc33 and electric capacity C33 again in parallel after connect the 9th pin, 13rd pin connects the 14th pin by resistance R34, 14th pin connects the 2nd pin of U3 by potentiometer R32, connect the 3rd pin of U4,

Described operational amplifier U3 the 1st pin is connected with the 2nd pin by resistance Rz, connected by the 9th pin of resistance R3 and U2, U3 the 2nd pin connects 14 pins of U2 by R32,3rd pin ground connection, 4th pin meets VCC, 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin completes overpotential device R21 connects the 2nd pin of U2, and the 8th pin meets VCC;

1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, 2nd pin connects the 7th pin of U1 by resistance Ra1, by series connection the 1st pin of resistance Ra2 and diode D4, by series connection the 6th pin of resistance Ra1 and resistance Ra5, by series connection the 6th pin of resistance Ra2 and Ra3, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin connects positive 14V power supply, 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Ra4, 7th pin connects the 7th pin of U6, 8th pin connects the 5th pin of U6, the 9th pin is connect by resistance Ra9, 9th pin is by series connection the 14th pin of resistance Ra8 and diode D6, by series connection the 13rd pin of resistance Ra10 and R6, 13rd pin is by series connection the 14th pin of resistance Ra7 and diode D6, 14th pin connects the 13rd pin by diode D5,

1st pin of described analog switch U6 connects the 2nd pin of U7, and the 2nd pin, the 14th pin connect positive 14V power supply, and the 3rd pin connects negative 14V power supply, 4th pin connects the 7th pin of U10, and the 5th pin connects the 8th pin of U5, and the 6th pin connects the 7th pin of U9,7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, the 9th pin, 10th pin, 11st pin, the 12nd pin, the 13rd pin is unsettled, 15th pin ground connection, the 16th pin connects the 13rd pin of U7;

1st pin of described voltage comparator U7, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 14th pin are unsettled, 3rd pin meets VCC, 4th pin, the 10th pin, the 12nd pin ground connection, 2nd pin connects positive 14V power supply by resistance R01, by the series connection ground connection of diode D1 and resistance R02,13rd pin connects positive 14V power supply by resistance R03, by the series connection ground connection of diode D2 and resistance R04;

1st pin of described operational amplifier U8 connects the 6th pin by resistance Rs1,2nd pin connects the 7th pin of U1,3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin connects positive 14V power supply, and the 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Rs2,7th pin connects the 3rd pin of U10, and the 8th pin connects the 3rd pin of U9, connects the 9th pin by Rs4,9th pin connects the 14th pin by resistance Rs3, and the 13rd pin connects the 7th pin of U2;

1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 4th pin of U6, and the 8th pin meets VCC.

Certainly, above-mentioned explanation is not to the restriction of invention, and the present invention is also not limited only to above-mentioned citing, and the change that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement, also belong to protection scope of the present invention.

Claims (2)

1., based on the method for the fractional order four systems automatically switched chaotic system of Chen type system, it is characterized in that being, comprise the following steps:

(1) according to Chen type chaos system I be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|x\right|-\mathrm{bz}\end{array}\right.---I$ a＝35,b＝3,c＝28

(2) according to Chen type chaos system II be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\left|y\right|-\mathrm{bz}\end{array}\right.---\mathrm{II}$ a＝35,b＝3,c＝28

(3) according to chaos system structure sign function III and IV be:

$\mathrm{sign}\left(x\right)=\left\{\begin{array}{cc}1& x\&GreaterEqual;0\\ -1& x<0\end{array}\right.---\mathrm{III}$

$\mathrm{sign}\left(x\right)=\left\{\begin{array}{cc}1& y\&GreaterEqual;0\\ -1& y<0\end{array}\right.---\mathrm{IV}$

(4) according to Chen type chaos system V be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{xsign}\left(y\right)-\mathrm{bz}\end{array}\right.---V$ a＝35,b＝3,c＝28

(5) according to Chen type chaos system VI be:

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=\mathrm{ysign}\left(x\right)-\mathrm{bz}\end{array}\right.---\mathrm{VI}$ a＝35,b＝3,c＝28

(6) according to chaos system structure choice function VII be:

$f\left(\mathrm{xy}\right)=\left\{\begin{array}{cc}\left|x\right|& x\&GreaterEqual;0,y\&GreaterEqual;0\\ \mathrm{xsign}\left(y\right)& x\&GreaterEqual;0,y<0\\ \mathrm{ysign}\left(x\right)& x<0,y\&GreaterEqual;0\\ \left|y\right|& x<0,y<0\end{array}\right.---\mathrm{VII}$

(7) a Chen type four systems automatically switched chaotic system IX is constructed according to system I, II, V, VI and choice function VII

$\left\{\begin{array}{c}\mathrm{dx}/\mathrm{dt}=a(y-x)\\ \mathrm{dy}/\mathrm{dt}=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ \mathrm{dz}/\mathrm{dt}=f\left(\mathrm{xy}\right)-\mathrm{bz}\end{array}\right.---\mathrm{IX}$ a＝35,b＝3,c＝28

(8) a Chen type fractional order four systems automatically switched chaotic system X is constructed according to system IX

$\left\{\begin{array}{c}{d}^{q}x/{\mathrm{dt}}^q=a(y-x)\\ d^{q}y/{\mathrm{dt}}^q=(c-a)x+\mathrm{cy}-\mathrm{xz}\\ d^{q}z/{\mathrm{dt}}^q=f\left(\mathrm{xy}\right)-\mathrm{bz}\end{array}\right.---X$ 0<q<1,a＝35,b＝3,c＝28

(9) according to chaos system X constructing analog Circuits System, voltage comparator U7 is utilized to obtain the low and high level of two simulations, x>=0 or x<0 and y>=0 or y<0, as the control inputs of analog switch U6, according to x>=0, y>=0, x>=0, y<0, x<0, y>=0 and x<0, y<0 tetra-kinds of different situations, the difference realizing f (xy) exports, thus realize the chaos system IX of four systems automatic switchover, chaos system X is realized again by fractional order integration, operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 adopts LF347, multiplier U4, multiplier U9, multiplier U10 adopts AD633JN, analog switch U6 adopts ADG409, voltage comparator U7 adopts LM139,

1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance Rx, connected with the 6th pin by resistance R1, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc11 of 6th pin is in parallel with electric capacity C11's, connecting resistance Rc12 and electric capacity C12's is in parallel again, connecting resistance Rc13 and electric capacity C13 again in parallel after connect the 7th pin, 7th pin connects the 13rd pin by resistance R13, connect the 1st pin of U4, the 2nd pin of U5 is connect by resistance Ra1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, 8th pin connects the 9th pin by resistance R25, 13rd pin connects the 14th pin by resistance R14, 14th pin connects the 2nd pin by potentiometer R11, the 2nd pin of U2 is connect by potentiometer R22,

1st pin of described operational amplifier U2 is connected with the 2nd pin by resistance Ry, connected with the 6th pin by resistance R2, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc21 of 6th pin is in parallel with electric capacity C21's, connect the in parallel of Rc22 and electric capacity C22 again, connect again Rc23 and electric capacity C23 in parallel after connect the 7th pin, 7th pin is connected with the 2nd pin by potentiometer R23, the 9th pin of U1 is connect by resistance R24, the 2nd pin of U1 is connect by potentiometer R12, the 13rd pin of U5 is connect by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, 8th pin connects the 13rd pin by resistance R33, first connect the in parallel of Rc31 and electric capacity C31, connect the in parallel of Rc32 and electric capacity C32 again, connecting resistance Rc33 and electric capacity C33 again in parallel after connect the 9th pin, 13rd pin connects the 14th pin by resistance R34, 14th pin connects the 2nd pin of U3 by potentiometer R32, connect the 3rd pin of U4,

Described operational amplifier U3 the 1st pin is connected with the 2nd pin by resistance Rz, connected by the 9th pin of resistance R3 and U2, U3 the 2nd pin connects 14 pins of U2 by R32,3rd pin ground connection, 4th pin meets VCC, 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin completes overpotential device R21 connects the 2nd pin of U2, and the 8th pin meets VCC;

1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, 2nd pin connects the 7th pin of U1 by resistance Ra1, by series connection the 1st pin of resistance Ra2 and diode D4, by series connection the 6th pin of resistance Ra1 and resistance Ra5, by series connection the 6th pin of resistance Ra2 and Ra3, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin connects positive 14V power supply, 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Ra4, 7th pin connects the 7th pin of U6, 8th pin connects the 5th pin of U6, the 9th pin is connect by resistance Ra9, 9th pin is by series connection the 14th pin of resistance Ra8 and diode D6, by series connection the 13rd pin of resistance Ra10 and Ra6, 13rd pin is by series connection the 14th pin of resistance Ra7 and diode D6, 14th pin connects the 13rd pin by diode D5,

1st pin of described analog switch U6 connects the 2nd pin of U7, and the 2nd pin, the 14th pin connect positive 14V power supply, and the 3rd pin connects negative 14V power supply, 4th pin connects the 7th pin of U10, and the 5th pin connects the 8th pin of U5, and the 6th pin connects the 7th pin of U9,7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, the 9th pin, 10th pin, 11st pin, the 12nd pin, the 13rd pin is unsettled, 15th pin ground connection, the 16th pin connects the 13rd pin of U7;

1st pin of described voltage comparator U7, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 14th pin are unsettled, 3rd pin meets VCC, 4th pin, the 10th pin, the 12nd pin ground connection, 2nd pin connects positive 14V power supply by resistance R01, by the series connection ground connection of diode D1 and resistance R02,13rd pin connects positive 14V power supply by resistance R03, by the series connection ground connection of diode D2 and resistance R04;

1st pin of described operational amplifier U8 connects the 6th pin by resistance Rs1,2nd pin connects the 7th pin of U1, the 3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, and the 4th pin connects positive 14V power supply, 11st pin connects negative 14V power supply, and the 6th pin connects the 7th pin by resistance Rs2, and the 7th pin connects the 3rd pin of U10,8th pin connects the 3rd pin of U9, connect the 9th pin by Rs4, the 9th pin connects the 14th pin by resistance Rs3, and the 13rd pin connects the 7th pin of U2;

1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 4th pin of U6, and the 8th pin meets VCC.

2. based on the fractional order four systems automatic switchover analog circuit of Chen type system, it is characterized in that being, by operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U5, operational amplifier U8 and multiplier U4, multiplier U9, multiplier U10 and voltage comparator U7 and analog switch U6 forms, described operational amplifier U1 connects voltage comparator U7, operational amplifier U5, operational amplifier U8, multiplier U4, operational amplifier U2, described operational amplifier U2 concatenation operation amplifier U1, operational amplifier U5, voltage comparator U7, operational amplifier U8, described operational amplifier U3 concatenation operation amplifier U2, multiplier U4, described operational amplifier U5 connecting analog switch U6, described voltage comparator U7 connecting analog switch U6, described operational amplifier U8 concatenation operation amplifier U5, multiplier U9, multiplier U10, described multiplier U9 connecting analog switch U6, described multiplier U10 connecting analog switch U6,

1st pin of described operational amplifier U1 is connected with the 2nd pin by resistance Rx, connected with the 6th pin by resistance R1, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc11 of 6th pin is in parallel with electric capacity C11's, connecting resistance Rc12 and electric capacity C12's is in parallel again, connecting resistance Rc13 and electric capacity C13 again in parallel after connect the 7th pin, 7th pin connects the 13rd pin by resistance R13, connect the 1st pin of U4, the 2nd pin of U5 is connect by resistance Ra1, connect the 5th pin of U7, connect the 2nd pin of U8, connect the 1st pin of U9, 8th pin connects the 9th pin by resistance R25, 13rd pin connects the 14th pin by resistance R14, 14th pin connects the 2nd pin by potentiometer R11, the 2nd pin of U2 is connect by potentiometer R22,

1st pin of described operational amplifier U2 is connected with the 2nd pin by resistance Ry, connected with the 6th pin by resistance R2, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin meets VCC, 11st pin meets VEE, the first connecting resistance Rc21 of 6th pin is in parallel with electric capacity C21's, connect the in parallel of Rc22 and electric capacity C22 again, connect again Rc23 and electric capacity C23 in parallel after connect the 7th pin, 7th pin is connected with the 2nd pin by potentiometer R23, the 9th pin of U1 is connect by resistance R24, the 2nd pin of U1 is connect by potentiometer R12, the 13rd pin of U5 is connect by Ra6, connect the 11st pin of U7, connect the 13rd pin of U8, connect the 1st pin of U10, 8th pin connects the 13rd pin by resistance R33, first connect the in parallel of Rc31 and electric capacity C31, connect the in parallel of Rc32 and electric capacity C32 again, connecting resistance Rc33 and electric capacity C33 again in parallel after connect the 9th pin, 13rd pin connects the 14th pin by resistance R34, 14th pin connects the 2nd pin of U3 by potentiometer R32, connect the 3rd pin of U4,

Described operational amplifier U3 the 1st pin is connected with the 2nd pin by resistance Rz, connected by the 9th pin of resistance R3 and U2, U3 the 2nd pin connects 14 pins of U2 by R32,3rd pin ground connection, 4th pin meets VCC, 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 12nd pin, the 13rd pin, the 14th pin are unsettled, and the 11st pin meets VEE;

1st pin of described multiplier U4 connects the 7th pin of U1, and the 3rd pin connects the 14th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin completes overpotential device R21 connects the 2nd pin of U2, and the 8th pin meets VCC;

1st pin of described operational amplifier U5 connects the 2nd pin by diode D3, 2nd pin connects the 7th pin of U1 by resistance Ra1, by series connection the 1st pin of resistance Ra2 and diode D4, by series connection the 6th pin of resistance Ra1 and resistance Ra5, by series connection the 6th pin of resistance Ra2 and Ra3, 3rd pin, 5th pin, 10th pin, 12nd pin ground connection, 4th pin connects positive 14V power supply, 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Ra4, 7th pin connects the 7th pin of U6, 8th pin connects the 5th pin of U6, the 9th pin is connect by resistance Ra9, 9th pin is by series connection the 14th pin of resistance Ra8 and diode D6, by series connection the 13rd pin of resistance Ra10 and Ra6, 13rd pin is by series connection the 14th pin of resistance Ra7 and diode D6, 14th pin connects the 13rd pin by diode D5,

1st pin of described analog switch U6 connects the 2nd pin of U7, and the 2nd pin, the 14th pin connect positive 14V power supply, and the 3rd pin connects negative 14V power supply, 4th pin connects the 7th pin of U10, and the 5th pin connects the 8th pin of U5, and the 6th pin connects the 7th pin of U9,7th pin connects the 7th pin of U5, and the 8th pin connects the 2nd pin of U3 by potentiometer R31, the 9th pin, 10th pin, 11st pin, the 12nd pin, the 13rd pin is unsettled, 15th pin ground connection, the 16th pin connects the 13rd pin of U7;

1st pin of described voltage comparator U7, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 14th pin are unsettled, 3rd pin meets VCC, 4th pin, the 10th pin, the 12nd pin ground connection, 2nd pin connects positive 14V power supply by resistance R01, by the series connection ground connection of diode D1 and resistance R02,13rd pin connects positive 14V power supply by resistance R03, by the series connection ground connection of diode D2 and resistance R04;

1st pin of described operational amplifier U8 connects the 6th pin by resistance Rs1,2nd pin connects the 7th pin of U1,3rd pin, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th pin connects positive 14V power supply, and the 11st pin connects negative 14V power supply, 6th pin connects the 7th pin by resistance Rs2,7th pin connects the 3rd pin of U10, and the 8th pin connects the 3rd pin of U9, connects the 9th pin by Rs4,9th pin connects the 14th pin by resistance Rs3, and the 13rd pin connects the 7th pin of U2;

1st pin of described multiplier U9 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 6th pin of U6, and the 8th pin meets VCC;

1st pin of described multiplier U10 connects the 7th pin of U2, and the 3rd pin connects the 7th pin of U8, the 2nd pin, the 4th pin, the 6th pin ground connection, and the 5th pin meets VEE, and the 7th pin connects the 4th pin of U6, and the 8th pin meets VCC.