CN102694465B - Real-time voltage-sharing method for cascaded transverter - Google Patents
Real-time voltage-sharing method for cascaded transverter Download PDFInfo
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- CN102694465B CN102694465B CN201210170136.8A CN201210170136A CN102694465B CN 102694465 B CN102694465 B CN 102694465B CN 201210170136 A CN201210170136 A CN 201210170136A CN 102694465 B CN102694465 B CN 102694465B
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Abstract
The invention provides a real-time voltage-sharing method for a cascaded transverter. According to the invention, before m pulse combinations are transmitted to each module, in the current AD period, a controller first finds out and sequences modules with the highest DC voltage and modules with the lowest DC voltage from the current controlled modules, as well as pulse combinations mostly discharging a module DC-side capacitor and pulse combinations mostly charging the module DC-side capacitor; and the controller swaps the modules with the highest DC voltage and the pulse combinations mostly discharging the module DC-side capacitor according to the sequencing, as well as the modules with the lowest DC voltage and the pulse combinations mostly charging the module DC-side capacitor according to the sequencing. The real-time voltage-sharing method has the advantages of simple arithmetic, high voltage-sharing speed and high precision.
Description
Technical field
The present invention relates to the method for equalizing voltage of tandem type converter, be specifically related to a kind of real-time method for equalizing voltage for tandem type converter.
Background technology
Tandem type converter is to cascade up and form a kind of circuit form of high voltage current changer with multiple sub-converters, it is a kind of technology path that high-voltage large-capacity power electronic equipment the most often adopts, in recent years, the development of tandem type converter rapidly, such as half-bridge tandem type converter, H bridge tandem type converter, modular multilevel formula converter, tandem type converter based on transformer isolation, etc.These converters have for high-pressure frequency-conversion, have for reactive power compensation, have for flexible DC power transmission, have for electric network swim control.
No matter which kind of form is the concrete topology of tandem type converter adopt, conventionally each sub-converter for cascade is called to " module ".Each module has DC bus capacitor device, and the voltage on this capacitor is called " direct voltage " of module.The safety that the height of direct voltage has determined power electronic device in module whether and the service behaviour of module whether good.Tandem type converter is in the time of operation, and the summation of the direct voltage of each mutually all modules normally remains unchanged.If wherein the direct voltage of certain or multiple modules has declined, must cause so the DC voltage rising of other modules, this phenomenon is called " direct voltage is unbalance ".Direct voltage is unbalance when serious, and the direct voltage of certain or multiple modules can exceed limit value, triggers the protection action of converter, even causes the power electronic device in this module to lose efficacy.Therefore, guarantee the safe and stable operation of tandem type converter, the direct voltage that important prerequisite is modules will at every moment be kept in balance, and is called " all pressing ".
The controller of converter relies on certain algorithm to adjust the driving pulse of power electronic device in modules, thereby adjusts direct voltage, realizes module and all presses.At present, typical method for equalizing voltage mainly comprises two kinds:
(1) according to certain rule, the pulse of rotation modules.Such as, the converter that is n for a module-cascade number, module be numbered k={1,2 ..., n-1, n}; So, 1 power frequency period of every mistake, just gives k+1 module (wherein the impulsive switched of n module is to the 1st module) the impulsive switched of current k module; So rotation does not stop.
(2) for each module arranges special DC voltage control algorithm.Such as, the direct voltage reference value of k module is u
dc *(k), actual DC voltage is u
dc(k), rely on pi regulator, make u
dc(k) progressively tend to u
dc *(k).
Reach the expense of balanced speed, precision and algorithm according to each module direct voltage, can judge the quality of method for equalizing voltage.For above-mentioned (1) kind method, its advantage is that algorithm is simple, and expense is very low; But just to direct voltage adjustment once, pressure rate is very slow, often needs even several seconds a few tens of milliseconds for 1 power frequency period of its every mistake; And, no matter all press what state, all according to the rotation pulse of certain rule machinery, sometimes contribute to all to press, sometimes but aggravate unbalancely, be difficult to realize good all pressures precision.For above-mentioned (2) kind method, its advantage be can be real-time the Pressure and Control of carrying out; But along with the increase of module-cascade quantity n, algorithm expense also significantly increases, the difficulty of realization increases; In addition, pressure rate and precision are also limited by the characteristic of pi regulator, and all press adjustment process easily to occur hyperharmonic vibration, and in transient process, voltage imbalance aggravates to some extent, jeopardizes the operation of module.
Therefore, the present invention proposes a kind of new method for equalizing voltage, and algorithm is simple, pressure rate is fast, precision is high.
Summary of the invention
The problem existing in order to solve above-mentioned prior art, the object of the present invention is to provide a kind of real-time method for equalizing voltage for tandem type converter, has the advantages that algorithm is simple, pressure rate is fast, precision is high.
In order to achieve the above object, the technical solution adopted in the present invention is:
For a real-time method for equalizing voltage for tandem type converter, for the module of the m in tandem type converter, described m is less than or equal to module-cascade sum, and within each AD cycle, controller all can obtain the direct voltage of m module, is designated as { u
dc(1), u
dc(2) ..., u
dc(m-1), u
dc(m) }; Meanwhile, controller also can, for modules generates m pulse combined, before m pulse combined is transferred to modules, within the current AD cycle, carry out following 3 steps:
Step 1: find out x the module that direct voltage is the highest, 1≤x < m, and successively module numbering is designated as to k from big to small according to its numerical value
uH(1), k
uH(2) ..., k
uH(x-1), k
uH(x); Find out y the module that direct voltage is minimum, 1≤y < m, and successively module numbering is designated as to k from small to large according to its numerical value
uL(1), k
uL(2) ..., k
uL(y-1), k
uL(y);
Step 2: find out and will cause DC bus capacitor device maximum x pulse combined of discharging, 1≤x < m, and successively the numbering of pulse combined is designated as to k from big to small according to the numerical value of its discharge capacity
pH(1), k
pH(2) ..., k
pH(x-1), k
pH(x); Find out and will cause DC bus capacitor device maximum y pulse combined of charging, 1≤y < m, and successively the numbering of pulse combined is designated as to k from big to small according to the numerical value of its charge volume
pL(1), k
pL(2) ..., k
pL(y-1), k
pL(y);
Step 3: by k
pH(1) individual and k
uH(1) individual pulse combined is exchanged, by k
pH(2) individual and k
uH(2) individual pulse combined is exchanged ..., by k
pH(x-1) individual and k
uH(x-1) individual pulse combined is exchanged, by k
pH(x) individual and k
uH(x) individual pulse combined is exchanged; By k
pL(1) individual and k
uL(1) individual pulse combined is exchanged, by k
pL(2) individual and k
uL(2) individual pulse combined is exchanged ..., by k
pL(y-1) individual and k
uL(y-1) individual pulse combined is exchanged, by k
pL(y) individual and k
uL(y) individual pulse combined is exchanged; Then, the pulse combined after adjusting is transferred to corresponding modules.
Compared to the prior art the present invention, has following beneficial effect:
1), algorithm expense is lower, within the current AD cycle, can complete;
2), pressure rate is fast, pressure equalizing can finish conventionally within one or several AD cycle;
3), under the effect of Pressure and Control, the difference between the direct voltage of all modules can be low to moderate about one thousandth;
4), pressure equalizing do not have overshoot, the direct voltage of all modules is all dull is tending towards balanced;
5), paired pulses combination only does the adjustment on order, and do not change the concrete numerical value of pulse combined, therefore do not affect the total output waveform of converter, also do not affect the external characteristic of converter.
Embodiment
Below in conjunction with embodiment, the present invention will be described in more detail.
A kind of real-time method for equalizing voltage for tandem type converter of the present embodiment, for the module of the m in tandem type converter, described m is less than or equal to module-cascade sum, and within each AD cycle, controller all can obtain the direct voltage of m module, is designated as { u
dc(1), u
dc(2) ..., u
dc(m-1), u
dc(m) }; Meanwhile, controller also can, for modules generates m pulse combined, before m pulse combined is transferred to modules, within the current AD cycle, carry out following 3 steps:
Step 1: find out x the module that direct voltage is the highest, 1≤x < m, and successively module numbering is designated as to k from big to small according to its numerical value
uH(1), k
uH(2) ..., k
uH(x-1), k
uH(x); Find out y the module that direct voltage is minimum, 1≤y < m, and successively module numbering is designated as to k from small to large according to its numerical value
uL(1), k
uL(2) ..., k
uL(y-1), k
uL(y);
Step 2: find out and will cause DC bus capacitor device maximum x pulse combined of discharging, 1≤x < m, and successively the numbering of pulse combined is designated as to k from big to small according to the numerical value of its discharge capacity
pH(1), k
pH(2) ..., k
pH(x-1), k
pH(x); Find out and will cause DC bus capacitor device maximum y pulse combined of charging, 1≤y < m, and successively the numbering of pulse combined is designated as to k from big to small according to the numerical value of its charge volume
pL(1), k
pL(2) ..., k
pL(y-1), k
pL(y);
Step 3: by k
pH(1) individual and k
uH(1) individual pulse combined is exchanged, by k
pH(2) individual and k
uH(2) individual pulse combined is exchanged ..., by k
pH(x-1) individual and k
uH(x-1) individual pulse combined is exchanged, by k
pH(x) individual and k
uH(x) individual pulse combined is exchanged; By k
pL(1) individual and k
uL(1) individual pulse combined is exchanged, by k
pL(2) individual and k
uL(2) individual pulse combined is exchanged ..., by k
pL(y-1) individual and k
uL(y-1) individual pulse combined is exchanged, by k
pL(y) individual and k
uL(y) individual pulse combined is exchanged; Then, the pulse combined after adjusting is transferred to corresponding modules.
Like this, for the highest that x module of script direct voltage: direct voltage the higher person, the d/d energy of its DC bus capacitor device is more, and direct voltage declines by a big margin; Direct voltage junior, the d/d energy of its DC bus capacitor device is less, and its direct voltage fall is less.And for minimum that y module of script direct voltage: direct voltage junior, the energy that its DC bus capacitor device is charged is more, and DC voltage rising amplitude is larger; Direct voltage the higher person, the energy that its DC bus capacitor device is charged is less, and its DC voltage rising amplitude is less.Thereby it is balanced that all direct voltages are all tending towards.
Above-mentioned pressure equalizing control method can not cause hyperharmonic oscillatory process, and its effect always forces the direct voltage of controlled module to be tending towards balanced.Through one or several AD week after date, it is balanced that the direct voltage of all m module can reach.
Tandem type converter is in running, and the unbalanced situation of direct voltage changes with operating condition, that is to say, the minimum module of the module that direct voltage is the highest and direct voltage changes occurring at any time.The no matter What gives of voltage imbalance, above-mentioned pressure equalizing control method always can those modules the highest for direct voltage in the current AD cycle and that direct voltage is minimum be implemented Pressure and Control.
Claims (1)
1. for a real-time method for equalizing voltage for tandem type converter, for the module of the m in tandem type converter, described m is less than or equal to module-cascade sum, and within each AD cycle, controller all can obtain the direct voltage of m module, is designated as { u
dc(1), u
dc(2) ..., u
dc(m-1), u
dc(m) }; Meanwhile, controller also can, for modules generates m pulse combined, is characterized in that: before m pulse combined is transferred to modules, within the current AD cycle, carry out following 3 steps:
Step 1: find out x the module that direct voltage is the highest, 1≤x < m, and successively module numbering is designated as to k from big to small according to its numerical value
uH(1), k
uH(2) ..., k
uH(x-1), k
uH(x); Find out y the module that direct voltage is minimum, 1≤y < m, and successively module numbering is designated as to k from small to large according to its numerical value
uL(1), k
uL(2) ..., k
uL(y-1), k
uL(y);
Step 2: find out and will cause DC bus capacitor device maximum x pulse combined of discharging, 1≤x < m, and successively the numbering of pulse combined is designated as to k from big to small according to the numerical value of its discharge capacity
pH(1), k
pH(2) ..., k
pH(x-1), k
pH(x); Find out and will cause DC bus capacitor device maximum y pulse combined of charging, 1≤y < m, and successively the numbering of pulse combined is designated as to k from big to small according to the numerical value of its charge volume
pL(1), k
pL(2) ..., k
pL(y-1), k
pL(y);
Step 3: by k
pH(1) individual and k
uH(1) individual pulse combined is exchanged, by k
pH(2) individual and k
uH(2) individual pulse combined is exchanged ..., by k
pH(x-1) individual and k
uH(x-1) individual pulse combined is exchanged, by k
pH(x) individual and k
uH(x) individual pulse combined is exchanged; By k
pL(1) individual and k
uL(1) individual pulse combined is exchanged, by k
pL(2) individual and k
uL(2) individual pulse combined is exchanged ..., by k
pL(
y-1) individual and k
uL(
y-1) individual pulse combined is exchanged, by k
pL(
y) individual and k
uL(
y) individual pulse combined exchanges; Then, the pulse combined after adjusting is transferred to corresponding modules.
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| CN201210170136.8A CN102694465B (en) | 2012-05-28 | 2012-05-28 | Real-time voltage-sharing method for cascaded transverter |
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| CN102694465A CN102694465A (en) | 2012-09-26 |
| CN102694465B true CN102694465B (en) | 2014-05-14 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1913321A (en) * | 2006-08-09 | 2007-02-14 | 北京四方清能电气电子有限公司 | DC voltage balance control method of three-level inverter |
| CN101707374A (en) * | 2009-11-25 | 2010-05-12 | 中国科学院电工研究所 | Direct current (DC) side capacitor voltage balancing control circuit for H-bridge cascaded active power filter |
| CN101860203A (en) * | 2010-05-28 | 2010-10-13 | 浙江大学 | Optimal pressure equalizing control method of modular multilevel converter type direct current transmission system |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101094002B1 (en) * | 2009-12-16 | 2011-12-15 | 삼성에스디아이 주식회사 | Power converting device |
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2012
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1913321A (en) * | 2006-08-09 | 2007-02-14 | 北京四方清能电气电子有限公司 | DC voltage balance control method of three-level inverter |
| CN101707374A (en) * | 2009-11-25 | 2010-05-12 | 中国科学院电工研究所 | Direct current (DC) side capacitor voltage balancing control circuit for H-bridge cascaded active power filter |
| CN101860203A (en) * | 2010-05-28 | 2010-10-13 | 浙江大学 | Optimal pressure equalizing control method of modular multilevel converter type direct current transmission system |
Non-Patent Citations (2)
| Title |
|---|
| 丁冠军等.新型多电平VSC子模块电容参数与均压策略.《中国电机工程学报》.2009,第29卷(第30期), |
| 新型多电平VSC子模块电容参数与均压策略;丁冠军等;《中国电机工程学报》;20091025;第29卷(第30期);第1-6页 * |
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