CN102035554B - System and method for metering and analyzing electric energy as well as analog-to-digital conversion circuit - Google Patents
System and method for metering and analyzing electric energy as well as analog-to-digital conversion circuit Download PDFInfo
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Abstract
The invention discloses a system and a method for metering and analyzing electric energy as well as an analog-to-digital conversion circuit, belonging to the field of intelligent grid. In the invention, two sampling units are simultaneously connected behind a sigma-delta modulation unit, wherein the D value of the first sampling unit is fixed for metering the electric energy and the D value of the second sampling unit is variable for analyzing sub-harmonic waves so as to improve the monitoring stability of the sub-harmonic waves and ensure the accuracy for metering the electric energy in the cost of less hardware. During variation of the grid frequency, the D value of the second sampling unit is automatically calculated and adjusted to realize self-adaptive adjustment and maintain the monitoring stability of sub-harmonic waves. Coefficient compensation is performed on the harmonic component in the second sampling unit so as to avoid attenuation of a transition zone of a medium-high frequency part resulting from using a 3-order CIC (Cascaded Integrator Comb) filter.
Description
Technical field
The present invention relates to intelligent grid field, particularly electric energy metrical and subharmonic analytical technology in intelligent grid.
Background technology
Along with the greatly developing of intelligent grid, people more and more pay close attention to the quality problems of electrical network real time execution in recent years, and then the cry that subharmonic is analyzed is also more and more higher.
In the present invention, alleged subharmonic is a kind of of harmonic wave, and its frequency is the N of fundamental frequency, and N is integer.
At present, the Fourier analysis of most Scheme Choice main flows that subharmonic is analyzed, but in real world applications, exist the problem that insoluble sampling rate cannot be synchronizeed with mains frequency.
The network operation frequency of China is 50Hz, near yet the fluctuation to some extent standard power frequency conventionally of the mains frequency in actual motion, the frequency fluctuation of this point point makes fixed sample system unable to do what one wishes just, if do not taken measures, be directly used in subharmonic analysis, will cause very large error and cannot normally use.
Segmentation scheme adopts the mode of building peripheral hardware, with comparator, obtain the zero crossing information of waveform, by hardware phase-locked-loop (Phase Lock Loop, be called for short " PLL ") frequency is doubly raised to enough two-forties, remove again to drive analog to digital converter (Analog Digital Converter, be called for short " ADC ") sampling clock, and then reached the actual effect that synchronization is sampled.
When external electrical network frequency is offset, comparator is realized the variation of zero crossing, and PLL also will re-start the stabilization process of a frequency locking, and the data of ADC are only the valid data that true synchronization is crossed afterwards, whenever frequency fluctuates, process described above can be run once again.Shortcoming is that the real-time synchronization effect of this type of scheme is also not ideal enough, the occasion often fluctuating in frequency there will be error tracking, meanwhile, system hardware dependence is large, structure complexity is large, product cost is too high, is not suitable for promoting in the low-cost application of electric energy meter etc.
Summary of the invention
The object of the present invention is to provide a kind of electric energy metrical and analytical system, method and analog to digital conversion circuit, with less hardware costs, both improved subharmonic monitoring stability, guaranteed again the accuracy of electric energy metrical.
For solving the problems of the technologies described above, embodiments of the present invention provide a kind of analog to digital conversion circuit, comprising:
∑-Δ modulating unit, for carrying out single-bit sampling to the analog signal of input;
The first sampling unit, for the single-bit sampled signal of ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of electric energy metrical, and the D value of the first sampling unit immobilizes;
The second sampling unit, for the single-bit sampled signal of ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of subharmonic analysis, and the D value of the second sampling unit is variable;
Wherein, D=FS/fs, FS is the sampling rate of ∑-Δ modulating unit, the extraction speed that fs is sampling unit.
Embodiments of the present invention also provide a kind of electric energy metrical and analytical system, comprise analog to digital conversion circuit, electric energy metrical unit and subharmonic analytic unit, wherein,
Analog to digital conversion circuit comprises:
∑-Δ modulating unit, for carrying out single-bit sampling to the analog signal of input;
The first sampling unit, for the single-bit sampled signal of ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of electric energy metrical, and the D value of the first sampling unit immobilizes;
The second sampling unit, for the single-bit sampled signal of ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of subharmonic analysis, and the D value of the second sampling unit is variable;
Wherein, D=FS/fs, FS is the sampling rate of ∑-Δ modulating unit, the extraction speed that fs is sampling unit;
Electric energy metrical unit is for carrying out electric energy metrical according to the digital signal of the first sampling unit output;
Subharmonic analytic unit is for carrying out subharmonic analysis according to the digital signal of the second sampling unit output.
Embodiments of the present invention also provide a kind of electric energy metrical and analytical method, comprise the following steps:
Steps A, carries out single-bit sampling to the analog signal of input, obtains single-bit sampled signal;
Step B, carries out the fixing reduction of speed of D value to single-bit sampled signal and extracts and low-pass filtering, uses the digital signal obtaining to supply electric energy metrical;
Step C, carries out the variable reduction of speed of D value to single-bit sampled signal and extracts and low-pass filtering, uses the digital signal obtaining to carry out subharmonic analysis;
Step B and step C be executed in parallel after steps A.
Compared with prior art, the main distinction and effect thereof are embodiment of the present invention:
After ∑-Δ modulating unit, connect two sampling units simultaneously, one of them D value is fixing, and for electric energy metrical, another D value is variable for subharmonic analysis, thereby with less hardware costs, both improve subharmonic monitoring stability, guaranteed again the accuracy of electric energy metrical.
Further, when mains frequency changes, automatically calculate and adjust the D value of the second sampling unit, can adjust adaptively, make subharmonic monitoring remain stable.
Further, in the second sampling unit, harmonic component is carried out to compensating coefficient, can make up the medium-high frequency part transition band decay because using 3 rank cic filters to cause.The actual test of this scheme is respond well, and the voltage and current signal to electrical network can meet within the scope of 2 to 21 subharmonic, reaches 5% subharmonic analysis precision, also can extrapolate the useful parameters such as irregularity of wave form simultaneously.
Further, when D value changes, abandon still unstabilized data of top n, can make the result of subharmonic monitoring more accurate.Through experiment repeatedly, during N=4, both can guarantee the stability of subharmonic monitoring result, can make again the break period of subharmonic monitoring the shortest.
Accompanying drawing explanation
Fig. 1 is the structural representation of a kind of analog to digital conversion circuit in first embodiment of the invention;
Fig. 2 is the structural representation of a kind of analog to digital conversion circuit in second embodiment of the invention;
Fig. 3 is the structural representation of a kind of electric energy metrical and analytical system in fifth embodiment of the invention;
Fig. 4 is the structural representation of another kind of electric energy metrical and analytical system in fifth embodiment of the invention;
Fig. 5 is the schematic flow sheet of a kind of electric energy metrical and analytical method in sixth embodiment of the invention.
Embodiment
In the following description, in order to make reader understand the application better, many ins and outs have been proposed.But, persons of ordinary skill in the art may appreciate that even without these ins and outs and the many variations based on following execution mode and modification, also can realize each claim of the application technical scheme required for protection.
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing, embodiments of the present invention are described in further detail.
First embodiment of the invention relates to a kind of analog to digital conversion circuit.Fig. 1 is the structural representation of this analog to digital conversion circuit.This analog to digital conversion circuit comprises:
∑-Δ modulating unit, for carrying out single-bit sampling to the analog signal of input.
First sampling (Decimation) unit, for the single-bit sampled signal of ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of electric energy metrical, and the D value of the first sampling unit immobilizes.
The second sampling unit, for the single-bit sampled signal of ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of subharmonic analysis, and the D value of the second sampling unit is variable.
Wherein, D=FS/fs, FS is the sampling rate of ∑-Δ modulating unit, the extraction speed that fs is sampling unit.Two sampling units carry out reduction of speed extraction and low-pass filtering, obtain lower sampling rate but more high-precision adc data, and it is to make full use of average effect in essence, with speed, changes precision.
After ∑-Δ modulating unit, connect two sampling units simultaneously, one of them D value is fixing, and for electric energy metrical, another D value is variable for subharmonic analysis, thereby with less hardware costs, both improve subharmonic monitoring stability, guaranteed again the accuracy of electric energy metrical.
The high-speed sampling clock FS of modulator, generally by crystal oscillating circuit, provided, such as the 1.8432MHz being obtained by 5.5296MHz crystal three frequency division provides, in embodiment of the present invention, remember that high speed bit stream speed FS and low speed extract the ratio D=FS/fs of speed fs, on the fixed sample rate path partly requiring at electric energy metrical, after D value design is selected, immobilize, for convenience of application, generally get 2 power (as 32,64,128 etc.); And in order to follow the tracks of the variation of external electrical network frequency f in, retaining on the basis of normal energy metering, we are second sampling unit of the parallel increase in rear end of each modulator, its D value is designed to software adjustable simultaneously, object is to wish when electrical network sinusoidal signal frequency fluctuates, in each cycle, total energy keeps 64 collection points, must meet relational expression fs=64*fin so, by two formulas above, can obtain D=FS/ (64*fin), certainly also need D value to get and round up, so because it represents that extraction yield must be integer.It can be seen, as long as by adjusting simply D value, can realize and synchronizeing with external electrical network frequency, obtain every cycle and fix the sampled data of 64, data after synchronous can relievedly be done fast Fourier transform (Fast Fourier Transform is called for short " FFT ") conversion, just obtain the real frequency spectrum of power network signal, synchronizing process recited above has greatly reduced the spectrum leakage effect that Fourier harmonic analysis produces, thereby has also improved the accuracy of detection of subharmonic.
The technical program, guaranteeing, under the impregnable prerequisite of electric energy metrical, just to provide synchronization data by simple change, in mains frequency fluctuation situation, has improved subharmonic monitoring stability.And effectively utilized the design feature (being ∑-Δ modulating unit+the first sampling unit) of existing sigma-delta ADC, only increased the sampling unit (being DEC filter) that is easy to realization, compare with the PLL+ADC scheme of prior art, greatly reduced hardware spending and reduced cost.
In alleged the first sampling unit of the present invention, the second sampling unit, first, second does not have the implication of order, priority or grade, only means that this is two different sampling units.
Second embodiment of the invention relates to a kind of analog to digital conversion circuit.Fig. 2 is the structural representation of this analog to digital conversion circuit.
The second execution mode improves on the basis of the first execution mode, main improvements are: when mains frequency changes, automatically calculate and adjust the D value of the second sampling unit, thereby can realize self adaptation adjustment, make subharmonic monitoring remain stable.Specifically, the second execution mode has increased mains frequency detecting unit and D value computing unit with respect to the first execution mode, wherein:
Mains frequency detecting unit, for detecting in real time current mains frequency (fin).Can have the detection of accomplished in many ways mains frequency, for example the multicycle zero crossing counting method of average, utilizes the sign change of neighbouring sample point to detect zero crossing, then, by recording repeatedly the equispaced of zero-crossing timing, just can be derived from power network signal frequency.And for example, allow sampled signal obtain square-wave signal by analog comparator, window enable counter while making of square-wave signal, also can be derived from frequency by count value.Etc..
D value computing unit, for calculating the value of FS/ (Y*fin), rounds result of calculation, obtain D value, be set to the second sampling unit, wherein Y is 2 P power, P is the predefined integer that is greater than 3, and fin is the mains frequency that mains frequency detecting unit detects.Preferably, can adopt the mode rounding up to round, also can make otherwise to round, as block, enter one etc.
Can be periodically to the D value of D value computing unit gained be set to the second sampling unit, also can be only after mains frequency detecting unit detects current mains frequency and changes, then the D value of D value computing unit gained is set to the second sampling unit.In each execution mode of the present invention, mains frequency changes and refers to that the variation of mains frequency reaches predefined thresholding, if changed, is less than thresholding, thinks and does not change, and this is that too small fluctuation can be ignored because system itself may exist error.
In some other execution mode of the present invention, the D value of the second sampling unit also can manual change, namely inputs when needed a value to the second sampling unit, this variation that is relatively applicable to mains frequency seldom, or the situation of manual control.Operator can, after mains frequency changes, manually arrange a suitable value to the second sampling unit.
Third embodiment of the invention relates to a kind of analog to digital conversion circuit.
The 3rd execution mode improves on the basis of the first or second execution mode, main improvements are: in the second sampling unit, harmonic component is carried out to compensating coefficient, can make up the medium-high frequency part transition band decay causing because using 3 rank cascaded integrator-comb (Cascade-integrator-Comb is called for short " CIC ") filter.Specifically:
The second sampling unit comprises:
3 rank cic filters, for realizing filtering extraction.
Compensating unit, for doing multiplication compensation to each harmonic component of 3 rank cic filter outputs.Adopt the benefit of 3 rank cic filters to be not need multiplier to realize simply, but can produce transition band decay by centering HFS, on frequency spectrum, the amplitude of seeing harmonic wave part is subject to falling and affect to a certain extent, so need to obtain frequency spectrum and carry out post-compensation operation done Flourier conversion by synchronized data.First ignore insignificant DC component, then according to formula below, harmonic component is done to multiplication compensation (multiplication by H (K) with K subharmonic), for example can select this frequency of fin=50Hz and calculate to obtain calculated value corresponding to each harmonic (as 2 to 21 times), get its inverse and be saved as fixed table as offset
H(K)＝{sin(D＊π＊fin＊K/FS)/sin(π＊fin＊K/FS)/D}^3
Sin () represents sine trigonometric function, and π represents circumference ratio, and ^ represents power computing, and fin is mains frequency, and K is greater than 1 positive integer, and K represents the K subharmonic of fin, and H (K) is the penalty coefficient to K subharmonic.
The actual test of this scheme is respond well, and the voltage and current signal to electrical network can meet within the scope of 2 to 21 subharmonic, reaches 5% subharmonic analysis precision, also can extrapolate the useful parameters such as irregularity of wave form simultaneously.
The technical program is fallen for the medium-high frequency decay of sampling unit, and simple software compensation method is provided, and makes the accuracy of detection of high order harmonic component obtain assurance.
Four embodiment of the invention relates to a kind of analog to digital conversion circuit.
The 4th execution mode improves on the basis of first, second or the 3rd execution mode, and main improvements are: the second sampling unit, when set D value variation, abandons top n data to be exported, and N is predefined positive integer.Here the variation of D value can be (as the second execution mode) that Lookup protocol causes, and can be also that initiation is manually set.
When D value changes, still unstabilized script will be for the data of subharmonic analysis to abandon top n, and the result that can make subharmonic monitor is more accurate.
Conventionally, there is the fluctuation that is no more than 10% in electrical network power frequency 50Hz, certainly the 60Hz adopting for some countries, this method is applicable too, like this frequency range maximum 45 to 66Hz, when monitoring foreign frequency generation skew, can pass through automated manner (formula is associated) or manual mode (user's setting), make extraction yield D value that the variation of tracing property occur, now the second sampling unit needs certain stabilization time, recommendation abandons front 4 unstabilized data still, both can guarantee the stability of subharmonic monitoring result, can make again the break period of subharmonic monitoring the shortest.
In the second sampling unit, can also comprise a buffer, for buffer memory data to be exported, the buffer memory of this buffer is exported data with batch processing mode after reaching predetermined threshold again.
Certainly, in the second sampling unit, also can not comprise buffer, not treat output data and carry out buffer memory, once there being data satisfactory to be exported output in real time, the benefit of this scheme is that time delay is minimum.
Fifth embodiment of the invention relates to a kind of electric energy metrical and analytical system.
This system comprises:
Analog to digital conversion circuit as described in any one in first to fourth execution mode;
Electric energy metrical unit, for carrying out electric energy metrical according to the digital signal of analog to digital conversion circuit the first sampling unit output.
Subharmonic analytic unit, for carrying out subharmonic analysis according to the digital signal of analog to digital conversion circuit the second sampling unit output.
Fig. 3, Fig. 4 are the structural representations of two examples of this electric energy metrical and analytical system, and wherein the AD conversion unit in Fig. 3 has adopted the structure of the first execution mode, and the AD conversion unit in Fig. 4 has adopted the structure in the second execution mode.
Be appreciated that whole system can realize in a chip, also can divide in polylith chip and realize.
Sixth embodiment of the invention relates to a kind of electric energy metrical and analytical method.Fig. 5 is the schematic flow sheet of this electric energy metrical and analytical method.
In step 501, the analog signal of input is carried out to single-bit sampling, obtain single-bit sampled signal.After this enter parallel step 502 and 504.
In step 502, single-bit sampled signal is carried out to the fixing reduction of speed of D value and extract and low-pass filtering, obtain digital signal.
After this enter step 503, the digital signal of using step 502 to obtain supplies electric energy metrical.
In step 504, single-bit sampled signal is carried out to the variable reduction of speed of D value and extract and low-pass filtering, obtain digital signal.
After this enter step 505, the digital signal of using step 504 to obtain is carried out subharmonic analysis.
Present embodiment is the method execution mode corresponding with the first execution mode, present embodiment can with the enforcement of working in coordination of the first execution mode.The correlation technique details of mentioning in the first execution mode is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in present embodiment also can be applicable in the first execution mode.
Seventh embodiment of the invention relates to a kind of electric energy metrical and analytical method.
The 7th execution mode improves on the basis of the 6th execution mode, main improvements are: when mains frequency changes, automatically calculate and adjust the D value of the second sampling unit, thereby can realize self adaptation adjustment, make subharmonic monitoring remain stable.
Specifically, also exist with Fig. 5 in the parallel following steps of flow process:
Detect in real time current mains frequency fin.
After calculating FS/ (Y*fin), round, obtain D value, this D value extracts and low-pass filtering for reduction of speed in step 504, and wherein Y is 2 P power, and P is the predefined integer that is greater than 3, and fin is the mains frequency that mains frequency detecting unit detects.
Present embodiment is the method execution mode corresponding with the second execution mode, present embodiment can with the enforcement of working in coordination of the second execution mode.The correlation technique details of mentioning in the second execution mode is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in present embodiment also can be applicable in the second execution mode.
Eighth embodiment of the invention relates to a kind of electric energy metrical and analytical method.
The 8th execution mode the 6th or the basis of the 7th execution mode on improve, main improvements are, to step 504 reduction of speed extract and low-pass filtering treatment in harmonic component carry out compensating coefficient.Specifically, in the reduction of speed extraction and low-pass filtering process of step 504, also comprise following sub-step:
The data of reduction of speed extraction and low-pass filtering gained are carried out to fast fourier transform and obtain frequency spectrum, the coefficient of each harmonic component in frequency spectrum is multiplied each other with the bucking-out system of following formula calculating gained respectively:
H(K)＝{sin(D＊π＊fin＊K/FS)/sin(π＊fin＊K/FS)/D}^3
Sin () represents sine trigonometric function, and π represents circumference ratio, and ^ represents power computing, and fin is mains frequency, and K is greater than 1 positive integer, and K represents the K subharmonic of fin, and H (K) is the penalty coefficient to K subharmonic.In order to accelerate arithmetic speed, the value of various H (K) can precompute, and exists in a table, while needing, directly uses.
Present embodiment is the method execution mode corresponding with the 3rd execution mode, present embodiment can with the enforcement of working in coordination of the 3rd execution mode.The correlation technique details of mentioning in the 3rd execution mode is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in present embodiment also can be applicable in the 3rd execution mode.
Ninth embodiment of the invention relates to a kind of electric energy metrical and analytical method.
The 9th execution mode the 6th, the 7th or the basis of the 8th execution mode on improve, main improvements are, in the reduction of speed extraction and low-pass filtering process of step 504, if D value changes, abandon top n for the data of subharmonic analysis, N is predefined positive integer.
Preferably, N=4.
Present embodiment is the method execution mode corresponding with the 4th execution mode, present embodiment can with the enforcement of working in coordination of the 4th execution mode.The correlation technique details of mentioning in the 4th execution mode is still effective in the present embodiment, in order to reduce repetition, repeats no more here.Correspondingly, the correlation technique details of mentioning in present embodiment also can be applicable in the 4th execution mode.
Each method execution mode of the present invention all can be realized in modes such as software, hardware, firmwares.No matter the present invention realizes with software, hardware or firmware mode, instruction code can be stored in the memory of computer-accessible of any type (for example permanent or revisable, volatibility or non-volatile, solid-state or non-solid-state, fixing or removable medium etc.).Equally, memory can be for example programmable logic array (Programmable Array Logic, be called for short " PAL "), random access memory (Random Access Memory, be called for short " RAM "), programmable read only memory (Programmable Read Only Memory, be called for short " PROM "), read-only memory (Read-Only Memory, be called for short " ROM "), Electrically Erasable Read Only Memory (Electrically Erasable Programmable ROM, be called for short " EEPROM "), disk, CD, digital versatile disc (Digital Versatile Disc, be called for short " DVD ") etc.
Although pass through with reference to some of the preferred embodiment of the invention, the present invention is illustrated and described, but those of ordinary skill in the art should be understood that and can do various changes to it in the form and details, and without departing from the spirit and scope of the present invention.
Claims (12)
1. an analog to digital conversion circuit, is characterized in that, comprising:
∑-Δ modulating unit, for carrying out single-bit sampling to the analog signal of input;
The first sampling unit, for the single-bit sampled signal of described ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of electric energy metrical, and the D value of the first sampling unit immobilizes;
The second sampling unit, for the single-bit sampled signal of described ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of subharmonic analysis, and the D value of the second sampling unit is variable;
Wherein, D=FS/fs, FS is the sampling rate of described ∑-Δ modulating unit, the extraction speed that fs is sampling unit.
2. analog to digital conversion circuit according to claim 1, is characterized in that, also comprises:
Mains frequency detecting unit, for detecting in real time current mains frequency;
D value computing unit rounds after calculating FS/ (Y*fin), obtains D value, is set to described the second sampling unit, and wherein Y is 2 P power, and P is the predefined integer that is greater than 3, and fin is the mains frequency that described mains frequency detecting unit detects.
3. analog to digital conversion circuit according to claim 1, is characterized in that, described the second sampling unit comprises:
3 rank cascade integral comb filters, for realizing filtering extraction;
Compensating unit, for the formula according to below, each harmonic component of described 3 rank cascade integral comb filter outputs is done to multiplication compensation:
H(K)＝{sin(D*π*fin*K/FS)/sin(π*fin*K/FS)/D}^3
Sin () represents sine trigonometric function, and π represents circumference ratio, and ^ represents power computing, and fin is mains frequency, and K is greater than 1 positive integer, and K represents the K subharmonic of fin, and H (K) is the penalty coefficient to K subharmonic.
4. according to the analog to digital conversion circuit described in any one in claims 1 to 3, it is characterized in that, described the second sampling unit, when set D value changes, abandons top n data to be exported, and N is predefined positive integer.
5. analog to digital conversion circuit according to claim 4, is characterized in that, described N=4.
6. analog to digital conversion circuit according to claim 4, is characterized in that, in described the second sampling unit, also comprises a buffer, and for buffer memory data to be exported, the buffer memory of this buffer is exported data with batch processing mode after reaching predetermined threshold again.
7. electric energy metrical and an analytical system, is characterized in that, comprises analog to digital conversion circuit, electric energy metrical unit and subharmonic analytic unit, wherein,
Analog-digital conversion circuit as described comprises:
∑-Δ modulating unit, for carrying out single-bit sampling to the analog signal of input;
The first sampling unit, for the single-bit sampled signal of described ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of electric energy metrical, and the D value of the first sampling unit immobilizes;
The second sampling unit, for the single-bit sampled signal of described ∑-Δ modulating unit output is carried out to reduction of speed extraction and low-pass filtering, output is for the digital signal of subharmonic analysis, and the D value of the second sampling unit is variable;
Wherein, D=FS/fs, FS is the sampling rate of described ∑-Δ modulating unit, the extraction speed that fs is described sampling unit;
Described electric energy metrical unit is for carrying out electric energy metrical according to the digital signal of described the first sampling unit output;
Described subharmonic analytic unit is for carrying out subharmonic analysis according to the digital signal of described the second sampling unit output.
8. electric energy metrical and an analytical method, is characterized in that, comprises the following steps:
Steps A, carries out single-bit sampling to the analog signal of input, obtains single-bit sampled signal;
Step B, carries out the fixing reduction of speed of D value to described single-bit sampled signal and extracts and low-pass filtering, uses the digital signal obtaining to supply electric energy metrical;
Step C, carries out the variable reduction of speed of D value to described single-bit sampled signal and extracts and low-pass filtering, uses the digital signal obtaining to carry out subharmonic analysis;
Described step B and step C be executed in parallel after steps A;
Wherein, D=FS/fs, the sampling rate of FS for the analog signal of input is carried out to single-bit sampling, the extraction speed of fs for described single-bit sampled signal is carried out to reduction of speed extraction.
9. electric energy metrical according to claim 8 and analytical method, is characterized in that, also comprises and described steps A and the parallel following steps of C:
Detect in real time current mains frequency;
After calculating FS/ (Y*fin), round, obtain D value, this D value extracts and low-pass filtering for the reduction of speed in described step C, and wherein Y is 2 P power, P is the predefined integer that is greater than 3, and fin is the mains frequency that described mains frequency detecting unit detects.
10. electric energy metrical according to claim 8 and analytical method, is characterized in that, in the reduction of speed extraction and low-pass filtering process of described step C, also comprises following sub-step:
The data of reduction of speed extraction and low-pass filtering gained are carried out to fast fourier transform and obtain frequency spectrum, the coefficient of each harmonic component in frequency spectrum is multiplied each other with the bucking-out system of following formula calculating gained respectively:
H(K)＝{sin(D*π*fin*K/FS)/sin(π*fin*K/FS)/D}^3
Sin () represents sine trigonometric function, and π represents circumference ratio, and ^ represents power computing, and fin is mains frequency, and K is greater than 1 positive integer, and K represents the K subharmonic of fin, and H (K) is the penalty coefficient to K subharmonic.
Electric energy metrical in 11. according to Claim 8 to 10 described in any one and analytical method, is characterized in that, in the reduction of speed extraction and low-pass filtering process of described step C, further comprising the steps of:
If D value changes, abandon top n for the data of subharmonic analysis, N is predefined positive integer.
12. electric energy metrical according to claim 11 and analytical methods, is characterized in that, described N=4.
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| US9385744B2 (en) * | 2012-09-07 | 2016-07-05 | Mediatek Inc. | Delta-sigma analog-to-digital converter with error suppression |
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