CN101188386A - PWM current rectifying system based on DSP and CPLD - Google Patents
PWM current rectifying system based on DSP and CPLD Download PDFInfo
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- CN101188386A CN101188386A CNA2007101503934A CN200710150393A CN101188386A CN 101188386 A CN101188386 A CN 101188386A CN A2007101503934 A CNA2007101503934 A CN A2007101503934A CN 200710150393 A CN200710150393 A CN 200710150393A CN 101188386 A CN101188386 A CN 101188386A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a PWM commutating system based on DSP and CPLD. The invention consists of a data collecting circuit, a signal processing circuit, a power drive circuit, a power switch circuit, a USB communication circuit, and a liquid crystal display circuit. The invention has the advantages that the hardware system and the software program of a computer are combined, the design of the hardware system is simple, and the software program can be easily understood. The invention collects three-phase current on the AC side, uses the SVPWM algorithm to improve the power factor on the grid side, is a green commutating system without producing harmonic pollution on the power grid, and uses the IGBT as the switch apparatus of the bridge power circuit. Compared with the GTO and the MOSFET, the invention improves the current carrying capacity and the voltage resistance of the switch apparatus. Two pieces of CPLD chip are designed standby for the circuit producing PWM pulse, and the reliability of the PWM is improved. By the high-speed data processing capacity of the DSP and the CPLD, the real-time performance and the precision of the PWM commutating system are improved greatly.
Description
(1) technical field:
The invention belongs to electric power system rectification control field, particularly a kind of PWM (pulse width modulation) commutation system and method for work thereof that integrates hardware technology and software programming based on DSP (digital signal processor) and CPLD (CPLD).
(2) background technology:
Power industry is a mainstay of the national economy industry, and the electric energy converting system is used widely in electric power system.The electric energy converting system comprises: rectification (AC-DC) system, inversion system (direct current becomes interchange) etc.Can effectively reduce harmonic content after the rectification, the power factor of AC side is significantly improved, realize the quick adjustment of commutation system etc. based on the PWM commutation system of DSP and CPLD.Commutation system after deliberation has state type semiconductor rectifier system, state type ion commutation system at present, these systems cut both ways, the main problem that exists is that the AC side power factor is descended, public electric wire net is polluted, current-carrying, the voltage endurance capability of the power device that it adopted are all less simultaneously, incompatible big electrical network commutation system.Therefore, development PWM rectifier pollution-free to public electric wire net, the efficient quality of power supply of assurance is still an important research direction.
(3) summary of the invention:
The object of the present invention is to provide a kind of PWM commutation system based on DSP and CPLD, its is in conjunction with obtaining superior rectification effect by IPM (Intelligent Power Module) for the hardware circuit of main device for power switching and SVPWM (space vector pulse width modulation) algorithm, stability and the reliability of the commutation system that has improved widely, and from the loss that reduces device for power switching to the full extent, improve the stability of a system, reduce causality loss, improve power supply quality.
Technical scheme of the present invention: a kind of PWM commutation system based on DSP and CPLD is characterized in that it is made up of data acquisition circuit, signal processing circuit, power driving circuit, power switch circuit, USB communicating circuit, liquid crystal display circuit; Said data acquisition circuit input is connected respectively on DC side load two ends and the AC side three-phase alternating-current supply, its output connects on the signal processing circuit respective input, and the corresponding output end of signal processing circuit is connected to the input of power driving circuit; The output of power driving circuit is connected to load through power switch circuit; The input of USB communicating circuit is connected to the corresponding output end of signal processing circuit; The input of liquid crystal display circuit is connected to the corresponding output end of signal processing circuit.
Above-mentioned said data acquisition circuit is made up of voltage transformer, current transformer, voltage modulate circuit, current regulating circuit and AD conversion chip; The input of voltage transformer is added to the DC side output, the input of current transformer is added on the AC side three phase mains, the output of the input termination voltage transformer of voltage modulate circuit, the output of the input termination current transformer of current regulating circuit, the output of voltage modulate circuit, current regulating circuit is connected respectively on the respective input of AD conversion chip, and the output of AD conversion is connected to the signal processing circuit respective input.
Above-mentioned said signal processing circuit is made up of dsp chip, CPLD chip one and CPLD chip two; The input of dsp chip is connected to the output of data acquisition circuit, the corresponding output end of dsp chip is connected to the respective input of CPLD chip one and CPLD chip two, the corresponding output end of CPLD chip one and CPLD chip two is connected to the input of power driving circuit, the respective input of CPLD chip one links to each other with the corresponding output end of CPLD chip two, and the corresponding output end of CPLD chip one links to each other with the respective input of CPLD chip two.
Above-mentioned said power driving circuit is made up of photoelectric isolating circuit, power amplification circuit and dead zone protecting circuit; The input of photoelectric isolating circuit is connected on the corresponding output end of signal processing circuit; the output of photoelectric isolating circuit is connected to the input of power amplification circuit; the output of power amplification circuit is connected to the input of the protective circuit of dying, and the output of dead band protection is connected to the input of power switch circuit.
Above-mentioned said power switch circuit is made up of 6 IGBT among the IPM, and 6 IGBT constitute three brachium pontis, and each brachium pontis is composed in series by two IGBT, composes in parallel between brachium pontis and the brachium pontis; The input of power switch circuit is connected on the three-phase alternating current, and the output of power switch circuit is connected in the load.
Space vector pulse width modulation (SVPWM) method of work that relates in the above-mentioned said power switch circuit is:
(1) respective interrupt service routine is detection AC side and dc voltage, electric current then;
(2) three phase coordinates are to the two-phase rotating coordinate transformation;
(3) dc voltage PI regulates, and is that the DC side current PI is regulated then;
(4) rotational coordinates is reference voltage sector and Time Calculation to the conversion of static coordinate then;
(5) finally generate the SVPWM driving pulse, interrupt then returning.
Above-mentioned said USB communicating circuit changes into USB mouth circuit by serial ports and level shifting circuit is formed; The input that serial ports changes into USB mouth circuit is connected to the corresponding output end of signal processing circuit, and the output that serial ports changes into USB mouth circuit is connected to the input of level shifting circuit, and the output of level conversion can be connected to the movable storage device of various USB mouths.
Above-mentioned said liquid crystal display circuit hardware is made up of liquid crystal display control chip, liquid crystal display buffer circuits and LCD; The input of liquid crystal display control chip is connected to the corresponding output end of signal processing circuit, and the output of liquid crystal display control chip is connected on the liquid crystal display buffer circuits, and the output of liquid crystal display buffer circuit is connected on the LCD.
Operation principle of the present invention: data acquisition circuit passes through voltage transformer respectively with the DC side load both end voltage of collection and the current signal of AC side three phase mains, voltage modulate circuit summation current transformer, the current regulating circuit, the output signal that obtains separately is connected respectively on the different pins of AD conversion chip, the AD conversion chip is realized the conversion of analog quantity to digital quantity, the digital quantity signal that obtains is connected on the signal processing circuit, signal processing circuit is carried out signal processing according to the signal that collects, the effect of dsp chip is that signal is carried out signal processing, adopt the SVPWM algorithm to realize required pwm signal, the SVPWM algorithm is calculated and output pwm signal by CPLD, signal after the signal processing is sent into CPLD chip one and CPLD chip two simultaneously, why adopting two CPLD is considerations for reliability, under the normal condition, pwm signal by one output of CPLD chip, in case DSP detects CPLD chip one and breaks down, switch to CPLD chip two immediately, by CPLD chip two output pwm signals.The pwm signal that produces is connected on the photoelectric isolating circuit of power driving circuit, the effect that photoelectricity is isolated is that realization light current is pressed the signal processing circuit of little electric current and the electrical isolation of the power switch circuit that forceful electric power is pressed big electric current, play the effect of guard signal treatment circuit, pass through power amplification circuit again, pwm signal is carried out power amplification, make the pwm signal that obtains that turning on and off of enough energy control IGBT be arranged, pass through dead zone protecting circuit again, prevent the appearance of this short-circuit conditions that two IGBT on some brachium pontis open simultaneously, the protection power switch circuit; The pwm signal of dead zone protecting circuit output is directly connected to the grid of IGBT and controls opening and turn-offing of IGBT, thereby make the output voltage of power switch circuit adjusted by regulating the time that 6 IGBT open shutoff, thereby realized the function of rectification, the USB communicating circuit earlier through serial ports change USB mouth circuit conversion become can warm swap the USB mouth, just can link to each other through level shifting circuit again with the movable storage device of various USB mouths, made things convenient for commissioning staff's on-line debugging program, analyzing failure cause; Liquid crystal display circuit can show some significant datas in the rectifier on LCD, be convenient to Field Force's monitoring.
Superiority of the present invention is: 1, hardware system combines with computer software programming, and Hardware Design is simple, and software programming is easy-to-understand; 2, gather AC side three-phase phase current,, reach and improve net side power factor height, electrical network is not caused the green commutation system of harmonic pollution by the SVPWM algorithm; 3, adopt the switching device of IGBT as the bridge-type power circuit, with GTO, MOSFET compares, and has improved the current capacity and the voltage endurance capability of switching device; 4, design circuit, improved the reliability that PWM produces by two standby generation pwm pulses of CPLD chip; 5, utilize DSP and CPLD data-handling capacity at a high speed, improved the real-time and the accuracy of this PWM commutation system greatly.
(4) description of drawings:
Accompanying drawing 1 is the overall structure block diagram of the related a kind of PWM commutation system based on DSP and CPLD of the present invention.
Accompanying drawing 2 is related a kind of based on the data acquisition circuit structure chart in the PWM commutation system of DSP and CPLD for the present invention.
Accompanying drawing 3 is related a kind of based on the signal processing circuit structure figure in the PWM commutation system of DSP and CPLD for the present invention.
Accompanying drawing 4 is related a kind of based on the power driving circuit structure chart in the PWM commutation system of DSP and CPLD for the present invention.
Accompanying drawing 5 is related a kind of based on the power switch circuit structure chart in the PWM commutation system of DSP and CPLD for the present invention.
Accompanying drawing 6 is related a kind of based on the USB communicating circuit structure chart in the PWM commutation system of DSP and CPLD for the present invention.
Accompanying drawing 7 is related a kind of based on the liquid crystal display circuit structure chart in the PWM commutation system of DSP and CPLD for the present invention.
(5) embodiment:
Embodiment: a kind of PWM commutation system (see figure 1) based on DSP and CPLD, it is characterized in that this system is made up of hardware device and computer software, mainly form by data acquisition circuit, signal processing circuit, power driving circuit, power switch circuit, USB communicating circuit, liquid crystal display circuit six parts.Said data acquisition circuit input is connected respectively on DC side load two ends and the AC side three-phase alternating-current supply, its output connects on the signal processing circuit respective input, and the corresponding output end of signal processing circuit is connected to the input of power driving circuit; The output of power driving circuit is connected to load; The input of USB communicating circuit is connected to the corresponding output end of signal processing circuit; The input of liquid crystal display circuit is connected to the corresponding output end of signal processing circuit.
Above-mentioned said data acquisition circuit (see figure 2) hardware device comprises: voltage transformer, current transformer, the voltage modulate circuit, the current regulating circuit, AD conversion chip ADS8364 several sections: the input of voltage transformer is added to the DC side output, the input of current transformer is added on the AC side three phase mains, the output of the input termination voltage transformer of voltage modulate circuit, the output of the input termination current transformer of current regulating circuit, the output of voltage modulate circuit is connected on the respective input of AD conversion chip ADS8364, the output of current regulating circuit is connected on the respective input of AD conversion chip ADS8364, and the output of AD conversion is connected to the signal processing circuit respective input.
Above-mentioned said signal processing circuit (see figure 3) hardware device comprises: dsp chip TMS320F2812, CPLD 1270 chips one, CPLD 1270 chips two; The input of dsp chip TMS320F2812 is connected to the output of data acquisition circuit, the corresponding output end of dsp chip TMS320F2812 is connected to the respective input of CPLD 1270 chips one and CPLD 1270 chips two, the corresponding output end of CPLD 1270 chips one and CPLD 1270 chips two is connected to the input of power driving circuit, the respective input of CPLD 1270 chips one links to each other with the corresponding output end of CPLD 1270 chips two, and the corresponding output end of CPLD 1270 chips one links to each other with the respective input of CPLD 1270 chips two.
Above-mentioned said power driving circuit (see figure 4) hardware device comprises: photoelectric isolating circuit 4504, power amplification circuit OP07, dead zone protecting circuit EP32.The input of photoelectric isolating circuit is connected on the corresponding output end of signal processing circuit; the output of photoelectric isolating circuit is connected to the input of power amplification circuit; the output of power amplification circuit is connected to the input of the protective circuit of dying, and the output of dead band protection is connected to the input of power switch circuit.
Above-mentioned said power switch circuit (see figure 5) is made up of 6 IGBT PS21564 among the IPM, and 6 IGBT PS21564 constitute three brachium pontis, and each brachium pontis is composed in series by two IGBT PS21564, composes in parallel between brachium pontis and the brachium pontis.The input of power switch circuit is connected on the three-phase alternating current, and the output of power switch circuit is connected in the load.
Above-mentioned said USB communicating circuit (see figure 6) hardware device comprises: serial ports changes into USB mouth circuit, level shifting circuit.The input that serial ports changes into USB mouth circuit is connected to the corresponding output end of signal processing circuit, and the output that serial ports changes into USB mouth circuit is connected to the input of level shifting circuit, and the output of level conversion can be connected to the movable storage device of various USB mouths.
Above-mentioned said liquid crystal display circuit (see figure 7) hardware device comprises: liquid crystal display control chip, liquid crystal display buffer circuits 74HC373, LCD SED1335.The input of liquid crystal display control chip is connected to the corresponding output end of signal processing circuit, and the output of liquid crystal display control chip is connected on the liquid crystal display buffer circuits, and the output of liquid crystal display buffer circuit is connected on the LCD.
Claims (8)
1. PWM commutation system based on DSP and CPLD is characterized in that it is made up of data acquisition circuit, signal processing circuit, power driving circuit, power switch circuit, USB communicating circuit, liquid crystal display circuit; Said data acquisition circuit input is connected respectively on DC side load two ends and the AC side three-phase alternating-current supply, its output connects on the signal processing circuit respective input, and the corresponding output end of signal processing circuit is connected to the input of power driving circuit; The output of power driving circuit is connected to load through power switch circuit; The input of USB communicating circuit is connected to the corresponding output end of signal processing circuit; The input of liquid crystal display circuit is connected to the corresponding output end of signal processing circuit.
2. according to the said a kind of PWM commutation system of claim 1, it is characterized in that said data acquisition circuit is made up of voltage transformer, current transformer, voltage modulate circuit, current regulating circuit and AD conversion chip based on DSP and CPLD; The input of voltage transformer is added to the DC side output, the input of current transformer is added on the AC side three phase mains, the output of the input termination voltage transformer of voltage modulate circuit, the output of the input termination current transformer of current regulating circuit, the output of voltage modulate circuit, current regulating circuit is connected respectively on the respective input of AD conversion chip, and the output of AD conversion is connected to the signal processing circuit respective input.
3. according to the said a kind of PWM commutation system of claim 1, it is characterized in that said signal processing circuit is made up of dsp chip, CPLD chip one and CPLD chip two based on DSP and CPLD; The input of dsp chip is connected to the output of data acquisition circuit, the corresponding output end of dsp chip is connected to the respective input of CPLD chip one and CPLD chip two, the corresponding output end of CPLD chip one and CPLD chip two is connected to the input of power driving circuit, the respective input of CPLD chip one links to each other with the corresponding output end of CPLD chip two, and the corresponding output end of CPLD chip one links to each other with the respective input of CPLD chip two.
4. according to the said a kind of PWM commutation system of claim 1, it is characterized in that said power driving circuit is made up of photoelectric isolating circuit, power amplification circuit and dead zone protecting circuit based on DSP and CPLD; The input of photoelectric isolating circuit is connected on the corresponding output end of signal processing circuit; the output of photoelectric isolating circuit is connected to the input of power amplification circuit; the output of power amplification circuit is connected to the input of the protective circuit of dying, and the output of dead band protection is connected to the input of power switch circuit.
5. according to the said a kind of PWM commutation system of claim 1 based on DSP and CPLD, it is characterized in that said power switch circuit is made up of 6 IGBT among the IPM, 6 IGBT constitute three brachium pontis, and each brachium pontis is composed in series by two IGBT, composes in parallel between brachium pontis and the brachium pontis; The input of power switch circuit is connected on the three-phase alternating current, and the output of power switch circuit is connected in the load.
6. according to the said a kind of PWM commutation system of claim 5, it is characterized in that space vector pulse width modulation (SVPWM) method of work that relates in the said power switch circuit is based on DSP and CPLD:
(1) respective interrupt service routine is detection AC side and dc voltage, electric current then;
(2) three phase coordinates are to the two-phase rotating coordinate transformation;
(3) dc voltage PI regulates, and is that the DC side current PI is regulated then;
(4) rotational coordinates is reference voltage sector and Time Calculation to the conversion of static coordinate then;
(5) finally generate the SVPWM driving pulse, interrupt then returning.
7. according to the said a kind of PWM commutation system of claim 1, it is characterized in that said USB communicating circuit changes into USB mouth circuit by serial ports and level shifting circuit is formed based on DSP and CPLD; The input that serial ports changes into USB mouth circuit is connected to the corresponding output end of signal processing circuit, and the output that serial ports changes into USB mouth circuit is connected to the input of level shifting circuit, and the output of level conversion can be connected to the movable storage device of various USB mouths.
8. according to the said a kind of PWM commutation system of claim 1, it is characterized in that said liquid crystal display circuit hardware is made up of liquid crystal display control chip, liquid crystal display buffer circuits and LCD based on DSP and CPLD; The input of liquid crystal display control chip is connected to the corresponding output end of signal processing circuit, and the output of liquid crystal display control chip is connected on the liquid crystal display buffer circuits, and the output of liquid crystal display buffer circuit is connected on the LCD.
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| CNA2007101503934A CN101188386A (en) | 2007-11-26 | 2007-11-26 | PWM current rectifying system based on DSP and CPLD |
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| CNA2007101503934A CN101188386A (en) | 2007-11-26 | 2007-11-26 | PWM current rectifying system based on DSP and CPLD |
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Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101814765A (en) * | 2010-04-06 | 2010-08-25 | 中国电力科学研究院 | Power supply control system of bidirectional electric automobile charger |
| CN101944745A (en) * | 2010-09-06 | 2011-01-12 | 北京理工大学 | Energy storage system and control method thereof |
| CN101986545A (en) * | 2010-05-13 | 2011-03-16 | 江苏大学 | Inverter driving device based on digital signal processor (DSP) and complex programmable logic device (CPLD) |
| CN101615854B (en) * | 2009-07-29 | 2011-04-20 | 北京交通大学 | Control method of three-phase voltage type PWM rectifier under unbalance voltage of power grid |
| CN102420534A (en) * | 2011-12-12 | 2012-04-18 | 西安福安创意咨询有限责任公司 | Power supply method for amplifing small signal and power |
| CN102420536A (en) * | 2011-12-12 | 2012-04-18 | 西安福安创意咨询有限责任公司 | LED isolated-form double power supply method |
| CN102882408A (en) * | 2012-10-29 | 2013-01-16 | 金海新源电气江苏有限公司 | Power unit of inverter |
| CN103817401A (en) * | 2014-02-20 | 2014-05-28 | 深圳市佳士科技股份有限公司 | Method and system for realizing current type limited bipolar PWM (pulse-width modulation) output by combining DSP (digital signal processor) with CPLD (complex programmable logic device) |
| CN104242691A (en) * | 2013-06-18 | 2014-12-24 | 无锡市幅瑞自动化科技有限公司 | Three-phase PWM rectifier based on DSP and IPM |
| CN105652691A (en) * | 2016-02-24 | 2016-06-08 | 中国地质大学（武汉） | Power electronic control simulation system |
| CN106802609A (en) * | 2017-03-28 | 2017-06-06 | 河北工业大学 | The device and method of SVPWM is produced based on PC/104 buses and CPLD |
| CN106965690A (en) * | 2017-03-24 | 2017-07-21 | 江苏理工学院 | A kind of adaptive fast-speed direct current charging system for new-energy automobile |
| CN107147310A (en) * | 2017-06-12 | 2017-09-08 | 湖南纽帕科技有限公司 | A kind of intelligent high-power rectifying equipment control system |
| CN107147309A (en) * | 2017-06-12 | 2017-09-08 | 湖南纽帕科技有限公司 | A kind of intelligent high-power rectifying equipment Monitoring and control system |
| CN113719463A (en) * | 2021-07-20 | 2021-11-30 | 深圳市风云实业有限公司 | Heat dissipation system of rack equipment and abnormity identification method thereof |
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2007
- 2007-11-26 CN CNA2007101503934A patent/CN101188386A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101615854B (en) * | 2009-07-29 | 2011-04-20 | 北京交通大学 | Control method of three-phase voltage type PWM rectifier under unbalance voltage of power grid |
| CN101814765A (en) * | 2010-04-06 | 2010-08-25 | 中国电力科学研究院 | Power supply control system of bidirectional electric automobile charger |
| CN101986545A (en) * | 2010-05-13 | 2011-03-16 | 江苏大学 | Inverter driving device based on digital signal processor (DSP) and complex programmable logic device (CPLD) |
| CN101986545B (en) * | 2010-05-13 | 2013-04-17 | 江苏大学 | Inverter driving device based on digital signal processor (DSP) and complex programmable logic device (CPLD) |
| CN101944745A (en) * | 2010-09-06 | 2011-01-12 | 北京理工大学 | Energy storage system and control method thereof |
| CN102420534A (en) * | 2011-12-12 | 2012-04-18 | 西安福安创意咨询有限责任公司 | Power supply method for amplifing small signal and power |
| CN102420536A (en) * | 2011-12-12 | 2012-04-18 | 西安福安创意咨询有限责任公司 | LED isolated-form double power supply method |
| CN102882408A (en) * | 2012-10-29 | 2013-01-16 | 金海新源电气江苏有限公司 | Power unit of inverter |
| CN104242691A (en) * | 2013-06-18 | 2014-12-24 | 无锡市幅瑞自动化科技有限公司 | Three-phase PWM rectifier based on DSP and IPM |
| CN103817401A (en) * | 2014-02-20 | 2014-05-28 | 深圳市佳士科技股份有限公司 | Method and system for realizing current type limited bipolar PWM (pulse-width modulation) output by combining DSP (digital signal processor) with CPLD (complex programmable logic device) |
| CN105652691A (en) * | 2016-02-24 | 2016-06-08 | 中国地质大学（武汉） | Power electronic control simulation system |
| CN106965690A (en) * | 2017-03-24 | 2017-07-21 | 江苏理工学院 | A kind of adaptive fast-speed direct current charging system for new-energy automobile |
| CN106802609A (en) * | 2017-03-28 | 2017-06-06 | 河北工业大学 | The device and method of SVPWM is produced based on PC/104 buses and CPLD |
| CN107147310A (en) * | 2017-06-12 | 2017-09-08 | 湖南纽帕科技有限公司 | A kind of intelligent high-power rectifying equipment control system |
| CN107147309A (en) * | 2017-06-12 | 2017-09-08 | 湖南纽帕科技有限公司 | A kind of intelligent high-power rectifying equipment Monitoring and control system |
| CN113719463A (en) * | 2021-07-20 | 2021-11-30 | 深圳市风云实业有限公司 | Heat dissipation system of rack equipment and abnormity identification method thereof |
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