CN100392974C - Method for automatic recongniting phase-sequence of phase control rectifier and its phase control rectifier - Google Patents
Method for automatic recongniting phase-sequence of phase control rectifier and its phase control rectifier Download PDFInfo
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Abstract
The present invention relates to a method for automatically identifying the phase sequence and the phase position of a phase-controlled rectifier and phase-controlled rectifier thereof, which belongs to the technical field of rectification for solving the problems of the phase sequence and the phase position of rectifying trigger pulses. The phase-controlled rectifier comprises a current mutual inductor, a fully controlled rectification bridge of a three-phase thyristor, a trigger controller and a synchronous signal generating circuit. The trigger controller is used for judging the phase sequence and the phase position. The phase-controlled rectifier with the structure is used, which can generate two paths of synchronous signals of which the phase difference of the phase positions is 30 degrees by the synchronous signal generating circuit. By the automatic judgment of the trigger controller, a correct triggering pulse sequence is given. The method provides the method and the device for automatically identifying the phase sequence and the phase position of a phase-controlled rectifier and simplifies the processes of the installation and the debugging of a three-phase controlled rectifier.
Description
Technical field
The present invention relates to a kind of method of automatic identification phase controlled rectifier phase-sequence phase and realize the device of this method, belong to the commutation technique field.
Background technology
Phase controlled rectifier is to adopt full control of controllable silicon or half control rectifier bridge as major loop, triggers phase place and changes output dc voltage by controlling each brachium pontis silicon controlled.In practical operation, the Installation and Debugging phase controlled rectifier need mate the phase-sequence phase of major loop and synchronizing signal, this is a very loaded down with trivial details job, relate to the design of rectifier transformer and synchrotrans wiring group and RC phase-shift circuit, when high-voltage applications, also need to be furnished with difference detector and dual trace oscilloscope subsidiary.Therefore, develop a kind of obtain under the prerequisite of synchronizing signal, can discern automatically rectifier bridge phase-sequence phase method and realize the device of this method, just become the problem of technical staff's research, but by the end of so far, the certain methods that people proposed all needs to know the phase relation of major loop and synchronizing signal, this still can not satisfy the needs of people in real work, if can further improve to have bigger Practical significance.
Summary of the invention
Technical problem to be solved by this invention is to overcome the defective that existing controlled rectifier exists and a kind of method that can discern the phase controlled rectifier phase-sequence phase automatically is provided.
Another problem to be solved by this invention provides the phase sequence self-adaption formula phase controlled rectifier of realizing this method.
The technical scheme that addresses the above problem is:
A kind of method of automatic identification phase controlled rectifier phase-sequence phase, it is with the rectifying device of thyristor as the three-phase thyristor bridge rectification circuit, six brachium pontis trigger from T1 to T6 order, wherein T1 is connected on power supply A mutually with T4, T3 is connected on power supply B mutually with T6, T2 is connected on C mutually with T5, the negative electrode of one group of three brachium pontis is linked to be the common cathode group, the anode of three brachium pontis of another group is linked to be common anode group, each thyristor all is provided with the relative trigger circuit, its improvements are, set up the synchronizing signal generative circuit and trigger controller, the synchronizing signal generative circuit is connected into two voltage comparators by operational amplifier, wherein, voltage comparator is connected to one 30 ° rc phase shifter circuit at its input, carries out as follows thereafter:
A. arbitrary alternating voltage is sent into this two voltage comparators as synchronizing signal, make both be output as the synchronizing signal square wave of 30 ° of two-way mutual deviations;
B. the two-way synchronizing signal is sent into the triggering controller of forming by CPU;
C. trigger controller and determine valid synchronization signal
Earlier effective with first via interrupt INT 1, trigger during the synchronizing signal zero passage and interrupt, in interrupt handling routine, trigger a pair of brachium pontis, PU=[T61 T12 T23 T34 T45 T56 defines arrays], j represents subscript, six value representatives need the brachium pontis sequence number of triggering, and six pairs of brachium pontis of conducting and six route voltages is a pair of when triggering a certain group, can make j from 0 to 5 trigger successively six times; Utilize an electric current A/D sample circuit and timer to cooperate the current peak time of obtaining, circulating sampling, and in sampling process, calculate current peak time T ip simultaneously, electric current is reached the numerical value that the time change of peak value is represented for the power frequency electrical degree, if Tip equals one of 30 °, 90 ° or 150 °, then be invalid synchronizing signal, remaining another road INT2 then is a valid synchronization signal;
In six triggerings of valid synchronization signal, must have twice its Tip of triggering to equal 120 ° and 180 °, the PU subscript sequence number of this twice triggering correspondence is to judge the key of phase-sequence phase, the starting point when 120 ° of then corresponding phase shifts trigger from array PU value.So-called Tip is meant that electric current reaches the numerical value that the time change of peak value is represented for the power frequency electrical degree, is 10ms if electric current reaches the time of peak value, then is equivalent to Tip and equals 180 °.
D. determine phase sequence
The following j1 that is designated as of Tip=120 ° of corresponding PU of note, the following j2 that is designated as of Tip=180 ° of corresponding PU of note, in array PU, if j1＜j2 or j1=5 and j2=0, the brachium pontis sequence number that expression triggers successively increases progressively, and illustrates that major loop is a positive sequence; Otherwise the brachium pontis sequence number that expression triggers is successively successively decreased, and illustrates that major loop is a negative phase-sequence;
Other 5 tunnel synchronizing signal can utilize timer with power frequency six frequencys multiplication, and is interrupted producing by timer, triggers order and is determined by fixed phase sequence, and triggering is given by triggering controller constantly, and triggering signal is interrupted providing by the time-delay that triggers timer in the controller;
E. trigger controller and export six tunnel triggering signals, after signal amplification circuit, pulse transformer amplify isolation, form high-frequency impulse series, trigger the trigger electrode of thyristor respectively, drive six brachium pontis of fully controlled bridge according to the program of establishment.
The method of above-mentioned automatic identification phase controlled rectifier phase-sequence phase, if load impedance angle θ satisfies greater than 75 ° or load time constant τ:
τ＞15ms (1)
By formula (2) are revised the Tip that calculates, and combine with formula (3) and draw voltage initial phase angle φ
u, φ
uRepresent the electrical degree that this voltage differs from the zero passage moment and triggering constantly.
In the formula
Expression rounds up, and should be modified to the line voltage initial phase angle φ than 30 ° of integral multiples of its big vicinity
u
Tip+φ
u＝180° (3)
A kind of phase sequence self-adaption formula phase controlled rectifier, its major loop comprises main transformer B, current transformer LG, controllable silicon full-controlled rectifier bridge, trigger controller, in addition, it also is provided with a synchronizing signal generative circuit, described synchronizing signal generative circuit is by operational amplifier U1, U2, U3, adjustable resistance VR1, resistance R 1, R2, R3, R4, R5, R6, R7, R8, capacitor C 1, C2 forms, operational amplifier U1 is connected into follower circuit, its positive terminal is through resistance R 1, the resistor voltage divider circuit that R2 forms connects the 220V single phase poaer supply, output connects the positive terminal of operational amplifier U3 and U2 simultaneously, the output of operational amplifier U2 and U3 is respectively through resistance R 8, R7 connects the external interrupt pin that major loop triggers controller, their negative phase end ground connection, resistance R 4, capacitor C 1 is formed filter circuit, be connected on the input of U3, adjustable resistance VR1, capacitor C 2 is formed phase-shift circuit, is connected on the input of U2.
Above-mentioned phase sequence self-adaption formula phase controlled rectifier, described triggering controller is by CPU, signal output apparatus U4, pulse transformer TR1, current transformer HG forms, wherein, the P0.1 of CPU, P0.2 meets the two-way interrupt signal INT1 of synchronizing signal generative circuit respectively, INT2, the output P2.2 of CPU connects the signal input part of signal output apparatus U4, the latter exports and connects pulse transformer TR1, the output of pulse transformer is connected to the trigger electrode of controllable silicon SCR, direct current signal after the current transformer LG rectification is connected to the P1.1 end of CPU, given signal is connected to P1.2, and signal output apparatus U4 adopts the Darlington transistor chip.
Above-mentioned phase sequence self-adaption formula phase controlled rectifier inserts optical coupling isolator between described operational amplifier U2 and U3 output and triggering controller external interrupt pin.
Above-mentioned phase sequence self-adaption formula phase controlled rectifier, parallel resistance R3 on described resistance R 2.
Above-mentioned phase sequence self-adaption formula phase controlled rectifier, the positive terminal of described operational amplifier U1 can replace resistance R 1 with synchrotrans.
Adopt the method for this automatic identification phase controlled rectifier phase-sequence phase and realize the phase controlled rectifier of this method, can produce the synchronizing signal of 30 ° of two-way phase phasic differences by its synchronizing signal generative circuit, send into the external interrupt pin that major loop triggers controller, automatically judge the major loop phase-sequence phase by triggering controller, determine correct trigger impulse order.Installation and Debugging process when this rectifier has also been simplified three-phase controlled rectifier band inductive load, and have the simple advantage of circuit design.
Description of drawings
Fig. 1 is a major loop electrical schematic diagram of the present invention;
Fig. 2 is a synchronizing signal generative circuit electrical schematic diagram;
Fig. 3 triggers the controller electrical schematic diagram;
Fig. 4 is each phase line voltage and natural commutation point correspondence table;
Fig. 5 is a bridge rectifier phase shifting control algorithm routine block diagram;
Fig. 6 is a phase place phase sequence prediction table;
Fig. 7 is a phase sequence self-adaption evaluation algorithm main program block diagram;
Fig. 8 is the phase controlled rectifier algorithm routine block diagram that possesses the phase sequence self-adaption function;
Fig. 9 is that three-phase is not controlled commutating voltage waveform and natural commutation point (representing the three-phase waveform with the different sine curve of the depth among the figure).
Embodiment
The three-phase thyristor bridge rectification circuit as shown in Figure 1.Each brachium pontis is made of through connection in series-parallel technology (claiming that at this moment a brachium pontis is a valve) a half control device or one group of half control device, and the half control device generally adopts thyristor.Wish six brachium pontis traditionally by triggering from the order of T1 to T6, the serial number that six brachium pontis are pressed Fig. 1 for this reason, wherein T1 and T4 be connected on power supply A mutually, T3 and T6 be connected on power supply B mutually, T2 is connected on C mutually with T2.Above the negative electrode of three brachium pontis (T1, T3, T5) connect together, be called the common cathode group, below the anode of three brachium pontis (T4, T6, T2) connect together, be called common anode group, common cathode group and common anode group must respectively have an out of phase brachium pontis conducting could form path simultaneously, so must control simultaneously.L represents load inductance, and R represents load resistance.
When only considering the positive sequence situation, the commutation order of six route voltages is UAB, UAC, UBC, UBA, UCA, UCB, and next cycle repeats said process.With the expression of brachium pontis numbering, correspond to T61, T12, T23, T34, T45, T56.Each cycle has six commutations, corresponding 6 natural commutation point, and natural commutation point is positioned at 60 ° of moment of every route voltage, waveform as shown in Figure 9, promptly ω t is respectively 30 °, 90 °, 150 °, 210 °, 270 °, the 330 ° moment, sums up the back shown in table among Fig. 4.
Natural commutation point is phase shifting angle to be implemented the reference point of control, is referred to as synchronizing signal.Phase controlled rectifier must at first be determined correct natural commutation point.As shown in Figure 1, the synchrotrans that are connected to three three-phase major loops adopt Y, the yn0 wiring, output voltage 30 ° of phase shifts again, ua ', then ua ' lags behind the line voltage U
AB60 °, as shown in Figure 2.The natural commutation point of the corresponding UAB of the zero crossing of ua ' (only considering that another negative sense zero crossing is not considered by the positive positive going zeror crossing of negative sense) forms square wave through the zero passage comparison circuit, sends into the external interrupt INT1 of CPU, as the synchronizing signal of UAB.When utilizing CPU to realize phase shifting control, generally only get one tunnel synchronizing signal, promptly only get the synchronizing signal of a route voltage,, utilize software to extrapolate other five natural commutation point as benchmark.
Interrupting with ua ' zero passage is that benchmark (is called external synchronization signal, produce by circuit), start the integrated timer T0 of CPU and produce interruption for per 60 °, ripple produces five times weekly, represent other five natural commutation point (to can be described as the inter-sync signal, produce by CPU), utilize another timer T1 to handle phase shift.In (inside and outside) synchronizing signal interrupt handling routine, (main program calculates phase shifting angle α with the phase shift value, and conversion exists among the variable TMP for timing value) compose and give timer T1 counter register, when α=60 °, should subtract a little value (SV), avoid interrupting conflicting with synchronizing signal.Underflow taking place when the T1 count value reduces to zero interrupt, sends trigger impulse in the interrupt handling routine.Phase shift range is 90 ° during rectifier bridge band inductive load, enters inverter mode greater than 90 °.
Define an array PU=[T61 T12 T23 T34 T45 T56], make j represent subscript.PU[0 during j=0]=T61, corresponding the 6th, No. 1 brachium pontis, and the like.At this section situation, the external synchronization signal zero crossing is the natural commutation point of UAB, that is triggers brachium pontis the 6th, No. 1, corresponding j=0, and major loop is positive sequence, the INTSEG value has been represented the value of array PU subscript j during algorithm for design.
Control Software is made of the AM/BAM task, and background task is a hypercycle, and foreground task is made of some interrupt handling routines, and the phase shifting control algorithm as shown in Figure 5.
Each three winding of the former and deputy limit of three-phase transformer, adopt respectively different bind modes, winding around to and label, can form the different phase-sequence phase relation of former and deputy sideline voltage, be referred to as joint group, consider that getting synchronizing signal needs the neutral line, secondary should be the yn wiring, and 12 kinds of standard joint group can be arranged, be Y, yn0, D, yn1, Y, yn2, D, yn3, Y, yn4, D, yn5, Y, yn6, D, yn7, Y, yn8, D, yn9, Y, yn10, D, yn11, phase difference 30 ° of integral multiples always between the different joint group.The synchrotrans that produce synchronizing signal link to each other with the three-phase major loop, adopt Y, and the yn0 joint group is again through 30 ° of capacitance-resistance phase shifts, so synchronizing signal and major loop phase relation are judged easily.If the supposition synchronizing signal is taken from the arbitrary cross streams voltage of electrical network, may take from different transformers with the major loop three-phase alternating voltage, at this moment the phase relation of synchronizing signal and major loop three-phase voltage has multiple possibility.According to transformer joint group principle, and consider major loop positive sequence, two kinds of phase sequences of negative phase-sequence, the phase relation of synchronizing signal and three-phase major loop has 24 kinds of situations at most.
According to above-mentioned analysis, the natural commutation point of each line voltage is positioned at 60 ° of phase places, and in 24 kinds of phase relations of synchronizing signal and main circuit voltage, odd positions is not positioned at 60 ° of phase places of arbitrary route voltage, is not the efficient synchronization signal.The even number position is the efficient synchronization signal.Because synchronizing signal is taken from arbitrary road AC power, zero crossing might be positioned at odd positions, and this moment can be with 30 ° of this synchronizing signal phase shifts (hysteresis) for obtaining valid synchronization signal, obtain the synchronizing signal of 30 ° of two-way mutual deviations, wherein must have and have only one the tunnel to be valid synchronization signal.
Shown in Figure 2 is synchronizing signal generative circuit electrical schematic diagram among the present invention.Show among the figure that 220V dividing potential drop output 4V left and right sides voltage advances U1A, R2, the R3 reliability that improves in parallel also can 5V voltage-stabiliser tube in parallel again; The U1A follower is done the impedance isolation, makes the RC phase shift accurate; R4, C1 value are very little, only strobe not phase shift substantially; Both values of VR1, C2 can be regulated, and obtain 30 ° of phase shifts (during power frequency 50Hz); U1C, U1B distinguish the two-way synchronizing signal of 30 ° of phase difference outputs, send into the external interrupt pin of CPU again through light-coupled isolation, and this circuit can be economized the change of desynchronizing.If 220V meets U1A (removing R1) again and can further improve reliability after the synchrotrans step-down certainly.
The electrical schematic diagram of the triggering controller that the present invention that shown in Figure 3 is adopts.Show among the figure, trigger controller and form by CPU, Darlington transistor integrated circuit 2003.CPU is the C8051F310 chip, it and 8051 compatibilities.Current feedback obtains through not controlling rectification from the current transformer of three-phase major loop, is givenly obtained by the bulk potential device, and according to actual condition, it is given etc. to be expressed as rotational speed setup or electric current.Electric current and given P1.1 and the P1.0 that inserts C8051F310 respectively, these two pins can be configured to inner A/D pin, realize the A/D conversion by CPU.INT1 and INT2 are obtained by Fig. 2 synchronizing signal generative circuit, and P0.1 and P0.0 can be configured to the external interrupt pin, receive synchronizing signal and interrupt.P2.2 to P2.7 is connected to the base stage of Darlington transistor integrated circuit 2003 respectively, and 2003 output connects the elementary of pulse transformer, control 24V on/off, thus form the high-frequency impulse row at the secondary of pulse transformer, trigger the trigger electrode of thyristor.Totally six tunnel triggering signals drive six brachium pontis of fully controlled bridge.The phase sequence self-adaption algorithm is realized by the C8051F310CPU programming.
In said process, produce the synchronizing signal of 30 ° of two-way phase phasic differences by the synchronizing signal generative circuit, send into the external interrupt pin that major loop triggers controller, judge the major loop phase-sequence phase automatically by triggering controller.The method of determining correct trigger impulse phase sequence is: the load current of inductive load (load impedance angle is near 90 °) and terminal voltage have relatively more fixing relation, and promptly the current phase lagging voltage is near 90 °.During three-phase phase control rectifier bridge band inductive load, if at a time trigger a pair of brachium pontis conducting, the current peak time T ip that calculates triggering and conducting generation this time (can be cooperated with timer by the A/D sampling, relatively timing calculating is tried to achieve continuously), can calculate and trigger constantly and the phase relation between the line voltage that applies.So-called Tip is meant that electric current reaches the numerical value that the time change of peak value is represented for the power frequency electrical degree, is 10ms if electric current reaches the time of peak value, then is equivalent to Tip and equals 180 °.Trigger constantly and determine by the zero crossing of synchronizing signal (producing through the zero balancing circuit) through a certain phase voltage of electrical network.By transformer connection group principle as can be known, no matter which kind of electric pressure, synchronizing signal and line voltage-phase must be 30 ° integral multiples.With 30 ° be the interval, major loop line voltage respectively has 12 kinds of phase relations when being positive sequence and negative phase-sequence.By three-phase phase controlled rectifier operation principle as can be known, the natural commutation point of every route voltage all is positioned at 60 ° of phase places of this line voltage, and 0 ° and 120 ° of corresponding other two-route wire voltage, promptly having only synchronizing signal and certain route voltage-phase is 0 °, 60 ° or 120 °, is only the efficient synchronization signal.And when phase place is 30 °, 90 °, 150 °, be not 60 ° integral multiple, can not become natural commutation point.Therefore utilize synchronizing signal generative circuit formation two-way to differ 30 ° synchronizing signal (a tunnel can cross zero balancing through step-down by the 220V control power supply obtains, and another road is 30 ° of generations of phase shift on the basis on last road).If one the tunnel is not 60 ° integral multiple.Then another road must be.Can not become natural commutation point in case extrapolate a certain road synchronizing signal, then getting another road is correct synchronizing signal.
A pair of thyristor at synchronizing signal zero crossing triggering rectifier bridge has 6 kinds of combinations, i.e. T12, T23, T34, T45, T56, T61.6 kinds of triggerings apply 6 kinds of line voltages successively in load, 6 kinds are triggered corresponding 6 kinds of line voltages, i.e. U in other words
AB, U
BA, U
BC, U
CB, U
AC, U
CA, wherein have only 3 kinds to be effective positive voltage, form electric current, other 3 kinds is negative voltage, can not conducting.The phase relation of synchronizing signal and 3 kinds of effective positive voltages also has 3 kinds, promptly 0 °, 60 °, 120 °, when being positioned at 60 ° of phase places of line voltage, be this route voltage natural commutation point, 60 ° of phase line voltage are 120 ° and that route voltage that is positioned at 0 ° of phase place is equivalent to lag behind, if that triggers that this brachium pontis sequence number is positioned at 60 ° of phase places is to after the brachium pontis sequence number, then the three-phase main circuit voltage is a positive sequence, otherwise is negative phase-sequence.Determined that finally synchronizing signal is the natural commutation point of which phase, and determined phase sequence.The a pair of brachium pontis that the synchronizing signal zero passage interrupts triggering determines that by said method other 5 tunnel synchronizing signal can utilize timer with power frequency six frequencys multiplication, and is interrupted producing by timer, triggers order and is determined by fixed phase sequence.Trigger constantly given and be converted into the timer time-delay and interrupt realizing through calculating by control system.
Because the phase relation of synchronizing signal and main circuit voltage is 30 ° a integral multiple, during by current peak time reckoning synchronizing signal and main circuit voltage phase relation, as long as load impedance angle is greater than 75 °, can correctly judge, but load impedance angle is less, as less than 65 °, add sampled measurements and timer error, can cause the erroneous judgement of phase relation.
Sum up above the analysis, draw phase place phase sequence prediction table, shown in table among Fig. 6.
In algorithm block diagram shown in Figure 7, it is effective which is at first judged in two tunnel synchronizing signals, and will effectively interrupt sequence number and exist in the INTNUM variable.
Supposition INTNUM=INT1 triggers the brachium pontis numbering from j=0 earlier.Trigger a pair of brachium pontis in synchronizing signal voltage zero-cross interrupt handling routine, its numbering is by the j decision, shown in the sync break handling procedure among the figure.The current drain of triggering and conducting last time such as 4 cycles of at first delaying time in the circulation of main program among the figure turn-offs brachium pontis to zero.Wait for then and interrupt taking place.
Interrupt beginning to detect electric current and starting timer T0 in case generation promptly detects variable first_trigger=1.Finish current sample and deposit variable Id in by I_AD () subprogram.If still less than limit value (20), the line voltage of representing this triggering does not have conducting for negative to electric current in 3ms, j is added 1 back continuation trigger next time, until j=5.Otherwise utilize variable Id1, Id2 to store last time and this current value and relatively real-time respectively, no longer increase up to electric current, when promptly electric current is maximum, the count value of timer T0 represent electric current from zero to the peak value elapsed time, claim the current peak time, represent with Tip in the literary composition.The T0 count cycle is made as 2us, according to formula T
0* 2 * 10
-3* 90/5 can be converted into electrical degree with time value represents, and deposits Id1 in, and the Tip in being equivalent to above analyze is according to formula
(being equivalent to formula 2),
Division of integer is carried out in expression earlier, only keeps integer, takes advantage of 30 again.If initial value Id1＞Id2 adds 30 with Id2 and composes to Id1, otherwise Id1=Id2, the contiguous 30 ° of big slightly multiple numerical value of in store former Id1 electrical degree among the Id1 in a word.
Id1=30,90 or 150 that is φ
uDuring=150,90 or 30 (according to formula 3), represent that this road synchronizing signal is invalid.
Corresponding φ when Id1=120
u=60, promptly this route voltage natural commutation point deposits j at this moment in j1.
Corresponding φ when Id1=180
u=0, promptly this route voltage delay is in 60 ° of that route voltages of j1 correspondence, deposits the j of this moment in j2, also triggers the brachium pontis that should trigger behind the j1 just during the rectifier bridge operate as normal.
If j1＜j2 or j1=5 and j2=0 represent positive sequence, make order=1; Otherwise be negative phase-sequence, make order=-1.
Three variablees of final this algorithm output:
INTNUM represents valid synchronization signal;
J1 represents that the synchronizing signal zero passage should start the brachium pontis numbering of triggering as synchronizing signal;
Order represents the major loop phase sequence.
Fig. 8 is the phase controlled rectifier algorithm that possesses the phase sequence self-adaption function, and it is on the basis of Fig. 5 phase shifting control algorithm, revises according to three variablees that the phase sequence self-adaption evaluation algorithm of Fig. 7 is exported.Main program enables INT1 or INT2 according to the INTNUM value, and all the other are constant.
Main correction is the T1 interrupt handling routine to Fig. 5, when positive sequence, triggers brachium pontis and is numbered (j1+INTSEG+A) %6; With A=0, during j1=0 example, along with INTSEG from 0 to 5, then trigger order and be followed successively by 0,1,2,3,4,5.When negative phase-sequence, trigger (j1+6-INTSEG+A) %6; With A=0, during j1=0 example, along with INTSEG from 0 to 5, then trigger order and be followed successively by 0,5,4,3,2,1.A represents that be 1 when trigger angle α＞60 °, be 0 when α＜=60 °.The j1 implication sees that Fig. 7 illustrates.
Claims (7)
1. automatic method of identification phase controlled rectifier phase-sequence phase, it is with the rectifying device of thyristor as the three-phase thyristor bridge rectification circuit, six brachium pontis trigger from T1 to T6 order, wherein T1 is connected on power supply A mutually with T4, T3 is connected on power supply B mutually with T6, T2 is connected on C mutually with T5, the negative electrode of one group of three brachium pontis is linked to be the common cathode group, the anode of three brachium pontis of another group is linked to be common anode group, each thyristor all is provided with the relative trigger circuit, it is characterized in that, set up the synchronizing signal generative circuit and trigger controller, the synchronizing signal generative circuit is connected into two voltage comparators by operational amplifier, wherein, voltage comparator is connected to one 30 ° rc phase shifter circuit at its input, carries out as follows thereafter:
A. arbitrary alternating voltage is sent into this two voltage comparators as synchronizing signal, make both be output as the synchronizing signal square wave of 30 ° of two-way mutual deviations;
B. the two-way synchronizing signal is sent into the triggering controller of forming by CPU;
C. determine valid synchronization signal
Earlier effective with first via interrupt INT 1, trigger during the synchronizing signal zero passage and interrupt, in interrupt handling routine, trigger a pair of brachium pontis, PU=[T61 T12 T23 T34 T45 T56 defines arrays], j represents subscript, and six values are represented six pairs of brachium pontis and six route voltages, can make j from 0 to 5 trigger successively six times; Utilize an electric current A/D sample circuit and timer to cooperate the current peak time of obtaining, circulating sampling, and in sampling process, calculate current peak time T ip simultaneously, electric current is reached the numerical value that the time change of peak value is represented for the power frequency electrical degree, if Tip equals one of 30 °, 90 ° or 150 °, then be invalid synchronizing signal, remaining another road INT2 then is a valid synchronization signal;
In triggering for six times of valid synchronization signal, the starting point that current peak time T ip equals 120 ° the then corresponding phase shift of voltage initial phase angle when triggering from array PU value;
D. determine phase sequence
The following j1 that is designated as of Tip=120 ° of corresponding PU of note, the following j2 that is designated as of Tip=180 ° of corresponding PU of note, in array PU, if j1＜j2 or j1=5 and j2=0, the brachium pontis sequence number that expression triggers successively increases progressively, and illustrates that major loop is a positive sequence; Otherwise the brachium pontis sequence number that expression triggers is successively successively decreased, and illustrates that major loop is a negative phase-sequence;
Other 5 tunnel synchronizing signal can utilize timer with power frequency six frequencys multiplication, and is interrupted producing by timer, triggers order and is determined by fixed phase sequence, and it is given that triggering moment oil triggers controller, and triggering signal is provided by the time-delay interruption that triggers timer in the controller;
E. export six tunnel triggering signals by the triggering controller according to the program of establishment and form high-frequency impulse series after amplifying isolation, trigger the trigger electrode of thyristor respectively, drive six brachium pontis of fully controlled bridge through signal amplification circuit, pulse transformer.
2. the method for automatic identification phase controlled rectifier phase-sequence phase according to claim 1, it is characterized in that if load impedance angle θ is less than 90 ° but greater than 75 °, or load time constant τ satisfies τ＞15ms, then the Tip that calculates is revised by following formula, and by Tip+ φ
u=180 ° draw voltage initial phase angle φ
u,
In the formula
Expression rounds up.
3. phase sequence self-adaption formula phase controlled rectifier, its major loop comprises main transformer B, current transformer LG, controllable silicon full-controlled rectifier bridge, trigger controller, it is characterized in that: it also is provided with a synchronizing signal generative circuit, described synchronizing signal generative circuit is by operational amplifier U1, U2, U3, adjustable resistance VR1, resistance R 1, R2, R3, R4, R5, R6, R6, R7, capacitor C 1, C2 forms, operational amplifier U1 is connected into follower circuit, its positive terminal is through resistance R 1, the resistor voltage divider circuit that R2 forms connects the 220V single phase poaer supply, output connects the positive terminal of operational amplifier U3 and U2 simultaneously, the output of operational amplifier U2 and U3 is respectively through resistance R 8, R7 connects the external interrupt pin that major loop triggers controller, operational amplifier U3 and U2 negative phase end ground connection, resistance R 4, capacitor C 1 is formed filter circuit, be connected on the input of operational amplifier U3, adjustable resistance VR1, capacitor C 2 is formed phase-shift circuit, is connected on the input end of operational amplifier U2.
4. phase sequence self-adaption formula phase controlled rectifier according to claim 3, it is characterized in that: described triggering controller is by CPU, signal output apparatus U4, pulse transformer TR1, current transformer HG forms, wherein, the P0.1 of CPU, P0.2 meets the two-way interrupt signal INT1 of synchronizing signal generative circuit respectively, INT2, the output P2.2 of CPU connects the signal input part of signal output apparatus U4, the latter exports and connects pulse transformer TR1, the output of pulse transformer is connected to the trigger electrode of controllable silicon SCR, direct current signal after the current transformer LG rectification is connected to the P1.1 end of CPU, given signal is connected to P1.2, and signal output apparatus U4 adopts the Darlington transistor chip.
5. phase sequence self-adaption formula phase controlled rectifier according to claim 4 is characterized in that: insert optical coupling isolator between described operational amplifier U2 and U3 output and triggering controller external interrupt pin.
6. phase sequence self-adaption formula phase controlled rectifier according to claim 5 is characterized in that: parallel resistance R3 on described resistance R 2.
7. phase sequence self-adaption formula phase controlled rectifier according to claim 6 is characterized in that: the positive terminal of described operational amplifier U1 adopts synchrotrans to replace resistance R 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100125361A CN100392974C (en) | 2004-09-21 | 2004-09-21 | Method for automatic recongniting phase-sequence of phase control rectifier and its phase control rectifier |
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| CNB2004100125361A CN100392974C (en) | 2004-09-21 | 2004-09-21 | Method for automatic recongniting phase-sequence of phase control rectifier and its phase control rectifier |
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| CN101871982B (en) * | 2010-06-01 | 2012-07-04 | 佛山市中格威电子有限公司 | Method and circuit for detecting phase sequence and asymmetrical voltage of three phase current |
| CN102122894B (en) * | 2011-02-12 | 2013-04-10 | 易泰帝传动技术(烟台)有限公司 | Method for detecting synchronous signal of direct current speed regulator |
| CN102497118A (en) * | 2011-12-29 | 2012-06-13 | 杭州四达电炉成套设备有限公司 | Passive isolation sampling circuit for output direct current of three-phase rectifier bridge |
| CN102944760A (en) * | 2012-10-17 | 2013-02-27 | 中色科技股份有限公司 | Simple and easy phase sequence test method of three-phase alternating current |
| CN103204069B (en) * | 2013-05-07 | 2015-08-19 | 湖南大学 | A kind of range extender of electric vehicle and control method |
| CN105301374B (en) * | 2014-05-29 | 2018-08-24 | 中车大连电力牵引研发中心有限公司 | Rectifier synchronous signal detection method, device and system |
| CN106468735B (en) * | 2015-08-17 | 2019-02-12 | 珠海格力节能环保制冷技术研究中心有限公司 | Phase angle acquisition methods and system |
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| CN110061664A (en) * | 2019-03-19 | 2019-07-26 | 南京国电南自维美德自动化有限公司 | A kind of synchronization signal phase-lacking fault-tolerant processing method and system |
| CN110333400A (en) * | 2019-08-19 | 2019-10-15 | 陕西万方节能科技股份有限公司 | A kind of three-phase power supply phase sequence and phase interruption testing device and method |
| CN111751631A (en) * | 2020-06-15 | 2020-10-09 | 中冶南方（武汉）自动化有限公司 | Rectifier phase sequence self-adaption method based on two-line voltage sampling |
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| CN115173723A (en) * | 2021-04-02 | 2022-10-11 | 地和工业技术（上海）有限公司 | Synchronous control method for three-phase high-voltage thyristor rectifier without synchronous sampling |
| CN115259294B (en) * | 2022-08-08 | 2023-10-27 | 华北电力科学研究院有限责任公司 | Device and method for adjusting PH of water body |
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