CA1257027A - Compensation circuit for use with an integrating amplifier - Google Patents
Compensation circuit for use with an integrating amplifierInfo
- Publication number
- CA1257027A CA1257027A CA000531660A CA531660A CA1257027A CA 1257027 A CA1257027 A CA 1257027A CA 000531660 A CA000531660 A CA 000531660A CA 531660 A CA531660 A CA 531660A CA 1257027 A CA1257027 A CA 1257027A
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- Prior art keywords
- tip
- response
- amplifier
- ring
- integrating
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M19/00—Current supply arrangements for telephone systems
- H04M19/001—Current supply source at the exchanger providing current to substations
- H04M19/005—Feeding arrangements without the use of line transformers
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Signal Processing (AREA)
- Interface Circuits In Exchanges (AREA)
- Devices For Supply Of Signal Current (AREA)
- Amplifiers (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
ABSTRACT
A compensation circuit for use with an integrating amplifier having an integrating capacitor connected between an input and output thereof. The integrating amplifier monitors an input signal and generates an integrated output signal in response thereto. The compensation circuit detects sudden variations in the input signal and in response momentarily discharges the integrating capacitor, thereby increasing responsiveness of the integrating amplifier in the event of sudden input signal variations.
A compensation circuit for use with an integrating amplifier having an integrating capacitor connected between an input and output thereof. The integrating amplifier monitors an input signal and generates an integrated output signal in response thereto. The compensation circuit detects sudden variations in the input signal and in response momentarily discharges the integrating capacitor, thereby increasing responsiveness of the integrating amplifier in the event of sudden input signal variations.
Description
01 This invention relates in general to 02 integrating amplifiers and more particularly to a 03 compensation circuit for use with an integrating 04 amplifier in the DC control circuit of a constant 05 current line circuit.
06 Integrating amplifiers are well known 07 circuits which are useful in many applications which 08 require generation or processing of analog signals.
09 The integrating amplifier is typically comprised of a differential amplifier having an integrating capacitor 11 connected between an inverting input and output 12 thereof. The integrating amplifier performs the 13 mathematical operation of integration and provides an 14 output signal proportional to the integral of an input signal applied thereto.
16 One useful application of the integrating 17 amplifier is in the DC control circuit of a constant 18 current line circuit for maintaining a predetermined 19 DC bias voltage level on a balanced telephone line.
Private automatic branch exchanges (PABXs) 21 normally supply operating power to a balanced 22 telephone line at typically -48 volts DC applied 23 across tip and ring leads of the line. Solid state 24 line circuits associated with the PABX apply AC
signals differentially to the tip and ring leads via 26 associated tip and ring differential driver circuits.
27 Normally, the tip lead is terminated at a 28 remote central office by connection to a source of -48 29 volts DC while the ring lead is connected to ground.
Thus, a low impedance load is connected across the tip 31 and ring leads which normally draws a large amount of 32 DC current, resulting in unwanted power dissipation 33 through Joule heating, etc.
34 DC control circuits have been designed for reducing the current flowing through the tip and ring 36 leads due to a low impedance load connected 37 thereacross, by means of reducing the differential 12~0~7 01 battery voltage applied to the tip and ring leads.
02 ~egative feedback is established in the DC
03 control circuit between the tip lead and an 04 integrating amplifier, for comparing the monitored tip 05 lead voltage with a predetermined offset voltage and 06 generating a DC bias signal proportional to the 07 difference therebetween. The bias signal is applied 08 equally to the tip and ring differential driver 09 circuits. Hence, the voltages on the tip and ring leads are maintained at a predetermined bias level 11 offset from the nominal line voltages, for maintaining 12 a constant current line feed and accommodating AC
13 signals superimposed thereon.
14 However, in response to the remote central office switching from a battery and ground feed to a 16 loop feed (i.e. a high (approximately lk ohm) 17 impedance connected across tip and ring lead), the DC
18 control circuit attempts to supply a higher tip and 19 ring lead differential voltage in order to maintain constant current flow. Because of the settling time 21 of the integrating amplifier, the line circuit is 22 unable to respond quickly to such sudden increases in 23 impedance. Thus, the PBX incorrectly detects that 24 there is a break in the loop, resulting for instance in an erroneous detection of an extra digit pulse 26 (i.e. approximately 100 msec. break in the loop).
27 According to the present invention, a 28 compensation circuit is provided for use with an 29 integrating amplifier, for detecting sudden variations in the input signal and in response momentarily 31 discharging the integrating capacitor, thereby 32 increasing responsiveness of the integrating amplifier 33 in the event of such sudden input signal variations.
34 Thus, a DC control circuit constructed in accordance with the present invention, provides correct biasing 36 of the DC voltage on the tip and ring leads to 37 maintain a constant current, regardless of sudden o~
02 increases in impedance connected to the tip and ring 03 line leads.
04 ~he circuit. is straight.forward and 05 inexpensive, and may be advantageously fabricated 06 ultilizing integrat.ed circuit technology.
07 In general, according to the present 08 invention there is provided a compensation circuit for 09 use with an integrating amplifier having an integrating capacitor connected between an input and 11 output thereof for monitoring an input signal and 12 generating an integrated output signal in response 13 thereto. The compensation circuit detects sudden 14 variations in the input signal and in response momentarily discharges the integrating capacitor, 16 thereby increasing responsiveness of the integrating 17 amplifier in the event of such sudden input signal 18 variations.
19 According to a preferred embodiment, a compensation circuit is provided for use in a constant 21 current line circuit having tip and ring differential 22 driver circuits for generating nominal tip and ring 23 lead battery voltages, and a DC control circuit 24 comprised of an integrating amplifier having an integrating capacitor connected thereacross, for 26 monitoring DC voltages carried by the tip lead and in 27 response generating a predetermined DC bias signal to 28 each of the tip and ring lead driver circuits for 29 maintaining constant DC feed current through the tip and ring leads. The compensation circuit detects 31 sudden increases in impedance connected to the tip and 32 ring leads and in response momentarily discharges the 33 integrating capacitor, thereby increasing 34 responsiveness of the DC control circuit in the event of, for example, the remote central office switching 36 from a battery and ground feed to a loop feed.
~,, 01 -3a -02 A better underst.anding of ~.he present 03 invention will be obtained with reference to the 04 det.ailed description below in conjunction with t.he 05 following drawing, in which:
06 Figure 1 is a schematic diagram of a 07 telephone line circuit including a DC cont.rol circuit 08 having compensation circuitry connected thereto, 09 according to a preferred embodiment of the present invention.
11 As an example of a useful application of 12 t.he compensat.ion circuit according to the present 13 invention, a constant current. t.elephone line circuit 14 will be described utilizing the inventive compensation circuit for controlling an integrating amplifier which 01 forms part of a DC control circuit.
02 However, it will understood to a person 03 skilled in the art that the compensation circuit of 04 the present invention may be applied to many other 05 circuits utilizing integrating amplifiers for 06 monitoring input signals characterized by sudden 07 changes or variations.
08 With reference to Figure 1, receive and 09 transmit circuits 1 and 3 are illustrated for receiving and transmitting audio signals to and from a 11 communication system, such as a PABX, via Rx and Tx 12 terminals thereof, respectively. The received signals 13 are differentially applied to tip and ring terminals T
14 and R, connected to a balanced telephone line via respective tip and ring differential driver circuits 5 16 and 7.
17 In particular, a signal received on the Rx 18 terminal is amplified via receive circuit 1, shown 19 diagrammatically as a differential amplifier, and applied via equal valued resistors 9 and 11 to 21 inverting and non-inverting inputs of driver circuits 22 5 and 7 respectively. The received signals are then 23 differentially applied to the tip and ring terminals T
24 and R, via equal valued output resistors 13 and 15, respectively.
26 Signals from a remote circuit, such as a 27 subscriber set or trunk circuit, carried by the 28 balanced line and appearing on the tip and ring 29 terminals, T and R, are received and amplified via a further differential amplifier 18, and applied to an 31 additional amplifier 23 via AC coupling capacitor 25 32 and input resistor 27. The received signals are 33 amplified in amplifier 23, and applied to the transmit 34 circuit 3 for reception by the PABX, via the Tx terminal. Amplifier 23 has an AC input matching 36 impedance ZIN connected thereto, for generating a 37 nominal AC input impedance in a well known manner.
01 The transmit circuit 3 is shown 02 diagrammatically as being comprised of a differential 03 amplifier 3A, line balancing impedances ZIN and 04 ZBAL~ as well as various gain adjusting resistors, 05 all of which comprises a well known design.
06 A portion of the amplified signal from 07 amplifier 18 is reapplied in aiding phase (i.e. via 08 positive feedback), to the tip and ring leads via 09 driver circuits 5 and 7, through equal valued resistors 19 and 21 respectively. The positive 11 feedback of the received signals to the tip and ring 12 leads serves to cancel the effect of output resistors 13 13 and 15 on the input impedance established by 14 ZIN Resistors 13 and 15 and ZIN provide a nominal balanced line impedance, yet resistors 13 and 16 15 can be made of low resistance for providing a low 17 resistance line current feed.
18 The signals output from amplifier 18 are 19 also applied to inverting and non-inverting inputs of an amplifier 17 via equal valued resistors 35 and 37, 21 and equal valued resistors 39 and 41, and are thus 22 effectively cancelled.
23 A predetermined amount of AC and DC
24 feedback is provided by feedback resistors 10 and 14 connected to driver circuits 5 and 7 respectively.
26 Considering the DC control aspect of the 27 line circuit, a -48 volt DC battery voltage source is 28 applied to the balanced line via driver circuits 5 and 29 7.
Amplifier 17 functions as a DC controller 31 or integrator for monitoring the DC voltage appearing 32 on the tip lead at the terminal Tc, via resistor 43, 33 and comparing the monitored tip lead voltage with a 34 predetermined DC voltage denoted as OFFSET, via resistor 45.
36 Capacitor 38 is connected to the output 37 and inverting input of amplifier 17, and capacitor 40 12~;~027 01 is connected to the non-inverting input and ground, 02 for filtering out AC signals, such as audio, and 03 thereby facilitate DC current control.
04 Amplifier 17 generates a DC bias level 05 signal proportional to the difference in voltage 06 between the monitored line voltage at Tc and the 07 external OFFSET voltage. The DC bias signal is 08 applied equally to inverting and non-inverting inputs 09 of ring and tip driver circuits 7 and 5 via equal valued resistors 47 and 49, respectively, such that a 11 negative feedback path is established for maintaining 12 the DC voltages on the tip and ring leads at the 13 predetermined bias level (controlled by the OFFSET
14 signal), relative to th~ nominal line voltages of 0 volts DC and -48 volts DC, respectively.
16 For example, disregarding the effect of 17 amplifier 18 which introduces a common mode signal to 18 amplifier 17, in the event the OFFSET voltage is set 19 at zero volts, the voltage at the node connecting resistors 37, 41, 45 and 46 is forced to zero volts.
21 Due to negative feedback of the voltage appearing on 22 the tip at the Tc terminal, the voltage at the node 23 connecting resistors 35, 39, 43 and 44 is also forced 24 to zero volts. In other words, the current flowing from the +5 volt source through resistors 44 and 43 26 towards the -2 volt sink provided by the Tc terminal, 27 results in ground potential appearing at the node 28 connecting resistors 35, 39, 43 and 44.
29 Accordingly, the negative feedback path established by amplifier 17 provides DC signal biasing 31 for maintaining the DC line voltage levels on the tip 32 and ring leads at -2 volts DC and -46 volts DC, 33 respectively, in the manner of a constant voltage 34 source.
In the event of excess current being drawn 36 by the tip and ring leads, due to a short line loop 37 length, etc., current limiting is provided for 01 reducing the total metallic current drawn by the tip 02 and ring leads to a predetermined level.
03 In particular, amplifier 18 has inverting 04 and non--inverting inputs connected across line feed 05 resistors 13 and 15 at terminals Tc, Tf, Rc and Rf via 06 equal valued input resistors 51, 53, 55 and 57. A
07 feedback resistor 52 is connected from an output of 08 amplifier 18 to an inverting input thereof in a well 09 known manner. Amplifier 18 senses the metallic current drawn in the tip and ring ~eads by summing the 11 currents flowing through line feed resistors 13 and 12 15, rejecting common mode currents, and in response 13 generating a further DC output voltage signal 14 inversely proportional thereto.
A predetermined DC threshold voltage 16 VsET (eg. -0.8 volts), is applied to the inverting 17 input of amplifier 17 via a diode 5g and input 18 resistor 35 such that in the event the voltage output 19 from amplifier 18 is sufficient to maintain the voltage on the node connecting resistors 37 and 41, 21 and 35 and 39 at approximately 0 volts, diode 59 22 remains reverse-biased, and the further DC voltage is 23 applied equally to the inverting and non-inverting 24 inputs of amplifier 17 via resistors 41 and 37, 39 and 35, so as to be effectively cancelled.
26 However, in the event that the metallic 27 current increases beyond a predetermined threshold, 28 such that the voltage at the node connecting resistors 29 35 and 39 drops below a predetermined voltage equal to the sum of VSET minus the forward voltage drop 31 across diode 59, the inverting input of amplifier 17 32 is maintained at approximately the aforementioned 33 predetermined voltage, and the voltage output from 34 amplifier 18 is applied only to the non-inverting input of amplifier 17, so as to be differentially 36 received and amplified therein.
37 Accordingly, amplifier 17 ceases 38 monitoring only the tip voltage carried by the 3~ - 7 -01 terminal TC ~ and the DC bias signal output from 02 amplifier 17 is adjusted in relation to the detected 03 metallic current, for limiting the metallic current 04 drawn by the tip and ring leads to a predetermined 05 level (eg. 30 millamps) as set by the threshold 06 voltage VSET. In particular, the DC bias voltage is 07 adjusted such that the voltage difference between the 08 line voltages on the tip and ring leads is reduced, 09 thereby maintaining the metallic current at the aforementioned predetermined level (eg. 30 millamps).
11 Thus, when drawing nominal current, the 12 control circuit of Figure 1 provides negative feedback 13 of the line voltage carried by the Tc terminal, for 14 maintaining the voltages on the tip and ring leads at predetermined offset bias voltages from their nominal 16 levels. Upon detection of a metallic current in 17 excess of a predetermined threshold level established 18 by VSETl diode 59 turns on, effectively clamping the 19 voltage on the inverting input of amplifier 17 at X
volts, such that the DC bias signal output therefrom 21 is adjusted in response to the metallic current 22 detected via amplifier 18, thereby maintaining the 23 current at a predetermined level.
24 According to a successful prototype of the invention resistors 43 and 46 were each 200k ohms, 26 resistors 41 and 39 were each 42k ohms, resistors 37 27 and 35 were each 150k ohms, and resistors 44 and 45 28 were each 500k ohms.
29 A comparator 80 has an inverting input connected to the output of differential amplifier 18 31 and a non-inverting input connected to a source of 32 threshold voltage (i.e. -5 volts). As discussed 33 above, differential amplifier 18 detects the flow of 34 metallic current in the tip and ring leads. The signal output from amplifier 18 is monitored in 36 comparator 80 and compared with the threshold voltage 0'~7 01 for detecting changes in line impedance of the tip and 02 ring leads.
03 Thus, in the event of a sudden impedance 04 increase in a remote load (i.e. a central office trunk 05 circuit) connected to the tip and ring leads, 06 decreased metallic current flows in the telephone 07 line. The decreased metallic current flow is detected 08 in differential amplifier 18, causing the comparator 09 80 to generate a control signal designated SHORT.
The SHORT signal output from comparator 80 11 is applied via a differentiating capacitor 86 to the 12 base input of a PNP transistor 88 having a collector 13 terminal thereof connected via pull up resistor 90 to 14 a source of -28 volts DC, and an emitter terminal connected to the base terminal via resistor 92 and to 16 one terminal of the aforementioned integrating 17 capacitor 38 connected between the output of amplifier 18 17 and the inverting input thereof.
19 In the event of sudden changes in the flow of metallic current as a result of sudden impedance 21 changes in the tip and ring lead (due, for example, to 22 the remote trunk circuit switching from a battery 23 and ground feed to loop feed, as discussed above), the 24 change in the output signal from comparator 80 is differentiated via capacitor 86 causing a momentary 26 enabling pulse to be applied to the base of PNP
27 transistor 88. In response, transistor 88 is 28 momentarily enabled, thereby discharging integrating 29 capacitor 38 via the source of discharging potential -28 volts DC through resistor 90.
31 Thus, amplifier 17 quickly compensates for 32 the change in line impedance, whereas in prior art 33 systems the line circuit would have operated in a 34 reduced current mode due to the settling time of integrating capacitor 38.
36 In summary, according to the present 37 invention, a compensation circuit is provided for use 38 _ 9 _ 0~7 01 with an integrating amplifier useful in a DC control 02 circuit of a constant current line circuit. The 03 compensation circuit detects sudden variations or 04 changes in the input signal applied to the integrating 05 amplifier, and in response discharges the integrating 06 capacitor thereby increasing responsiveness of the 07 integrating amplifier in the event of such sudden 08 changes or variations in the input signal.
09 A person understanding the present invention may conceive of further embodiments or 11 variations thereof.
12 For example, while the compensation 13 circuit of the present invention has been described 14 with reference to a particular application for increasing responsiveness of an integrating amplifier 16 used in the DC control circuit of a constant current 17 line circuit, the compensation circuit may be used for 18 other applications as well.
19 All such embodiments and variations are believed to be within the sphere and scope of the 21 present invention as defined by the claims appended 22 thereto.
06 Integrating amplifiers are well known 07 circuits which are useful in many applications which 08 require generation or processing of analog signals.
09 The integrating amplifier is typically comprised of a differential amplifier having an integrating capacitor 11 connected between an inverting input and output 12 thereof. The integrating amplifier performs the 13 mathematical operation of integration and provides an 14 output signal proportional to the integral of an input signal applied thereto.
16 One useful application of the integrating 17 amplifier is in the DC control circuit of a constant 18 current line circuit for maintaining a predetermined 19 DC bias voltage level on a balanced telephone line.
Private automatic branch exchanges (PABXs) 21 normally supply operating power to a balanced 22 telephone line at typically -48 volts DC applied 23 across tip and ring leads of the line. Solid state 24 line circuits associated with the PABX apply AC
signals differentially to the tip and ring leads via 26 associated tip and ring differential driver circuits.
27 Normally, the tip lead is terminated at a 28 remote central office by connection to a source of -48 29 volts DC while the ring lead is connected to ground.
Thus, a low impedance load is connected across the tip 31 and ring leads which normally draws a large amount of 32 DC current, resulting in unwanted power dissipation 33 through Joule heating, etc.
34 DC control circuits have been designed for reducing the current flowing through the tip and ring 36 leads due to a low impedance load connected 37 thereacross, by means of reducing the differential 12~0~7 01 battery voltage applied to the tip and ring leads.
02 ~egative feedback is established in the DC
03 control circuit between the tip lead and an 04 integrating amplifier, for comparing the monitored tip 05 lead voltage with a predetermined offset voltage and 06 generating a DC bias signal proportional to the 07 difference therebetween. The bias signal is applied 08 equally to the tip and ring differential driver 09 circuits. Hence, the voltages on the tip and ring leads are maintained at a predetermined bias level 11 offset from the nominal line voltages, for maintaining 12 a constant current line feed and accommodating AC
13 signals superimposed thereon.
14 However, in response to the remote central office switching from a battery and ground feed to a 16 loop feed (i.e. a high (approximately lk ohm) 17 impedance connected across tip and ring lead), the DC
18 control circuit attempts to supply a higher tip and 19 ring lead differential voltage in order to maintain constant current flow. Because of the settling time 21 of the integrating amplifier, the line circuit is 22 unable to respond quickly to such sudden increases in 23 impedance. Thus, the PBX incorrectly detects that 24 there is a break in the loop, resulting for instance in an erroneous detection of an extra digit pulse 26 (i.e. approximately 100 msec. break in the loop).
27 According to the present invention, a 28 compensation circuit is provided for use with an 29 integrating amplifier, for detecting sudden variations in the input signal and in response momentarily 31 discharging the integrating capacitor, thereby 32 increasing responsiveness of the integrating amplifier 33 in the event of such sudden input signal variations.
34 Thus, a DC control circuit constructed in accordance with the present invention, provides correct biasing 36 of the DC voltage on the tip and ring leads to 37 maintain a constant current, regardless of sudden o~
02 increases in impedance connected to the tip and ring 03 line leads.
04 ~he circuit. is straight.forward and 05 inexpensive, and may be advantageously fabricated 06 ultilizing integrat.ed circuit technology.
07 In general, according to the present 08 invention there is provided a compensation circuit for 09 use with an integrating amplifier having an integrating capacitor connected between an input and 11 output thereof for monitoring an input signal and 12 generating an integrated output signal in response 13 thereto. The compensation circuit detects sudden 14 variations in the input signal and in response momentarily discharges the integrating capacitor, 16 thereby increasing responsiveness of the integrating 17 amplifier in the event of such sudden input signal 18 variations.
19 According to a preferred embodiment, a compensation circuit is provided for use in a constant 21 current line circuit having tip and ring differential 22 driver circuits for generating nominal tip and ring 23 lead battery voltages, and a DC control circuit 24 comprised of an integrating amplifier having an integrating capacitor connected thereacross, for 26 monitoring DC voltages carried by the tip lead and in 27 response generating a predetermined DC bias signal to 28 each of the tip and ring lead driver circuits for 29 maintaining constant DC feed current through the tip and ring leads. The compensation circuit detects 31 sudden increases in impedance connected to the tip and 32 ring leads and in response momentarily discharges the 33 integrating capacitor, thereby increasing 34 responsiveness of the DC control circuit in the event of, for example, the remote central office switching 36 from a battery and ground feed to a loop feed.
~,, 01 -3a -02 A better underst.anding of ~.he present 03 invention will be obtained with reference to the 04 det.ailed description below in conjunction with t.he 05 following drawing, in which:
06 Figure 1 is a schematic diagram of a 07 telephone line circuit including a DC cont.rol circuit 08 having compensation circuitry connected thereto, 09 according to a preferred embodiment of the present invention.
11 As an example of a useful application of 12 t.he compensat.ion circuit according to the present 13 invention, a constant current. t.elephone line circuit 14 will be described utilizing the inventive compensation circuit for controlling an integrating amplifier which 01 forms part of a DC control circuit.
02 However, it will understood to a person 03 skilled in the art that the compensation circuit of 04 the present invention may be applied to many other 05 circuits utilizing integrating amplifiers for 06 monitoring input signals characterized by sudden 07 changes or variations.
08 With reference to Figure 1, receive and 09 transmit circuits 1 and 3 are illustrated for receiving and transmitting audio signals to and from a 11 communication system, such as a PABX, via Rx and Tx 12 terminals thereof, respectively. The received signals 13 are differentially applied to tip and ring terminals T
14 and R, connected to a balanced telephone line via respective tip and ring differential driver circuits 5 16 and 7.
17 In particular, a signal received on the Rx 18 terminal is amplified via receive circuit 1, shown 19 diagrammatically as a differential amplifier, and applied via equal valued resistors 9 and 11 to 21 inverting and non-inverting inputs of driver circuits 22 5 and 7 respectively. The received signals are then 23 differentially applied to the tip and ring terminals T
24 and R, via equal valued output resistors 13 and 15, respectively.
26 Signals from a remote circuit, such as a 27 subscriber set or trunk circuit, carried by the 28 balanced line and appearing on the tip and ring 29 terminals, T and R, are received and amplified via a further differential amplifier 18, and applied to an 31 additional amplifier 23 via AC coupling capacitor 25 32 and input resistor 27. The received signals are 33 amplified in amplifier 23, and applied to the transmit 34 circuit 3 for reception by the PABX, via the Tx terminal. Amplifier 23 has an AC input matching 36 impedance ZIN connected thereto, for generating a 37 nominal AC input impedance in a well known manner.
01 The transmit circuit 3 is shown 02 diagrammatically as being comprised of a differential 03 amplifier 3A, line balancing impedances ZIN and 04 ZBAL~ as well as various gain adjusting resistors, 05 all of which comprises a well known design.
06 A portion of the amplified signal from 07 amplifier 18 is reapplied in aiding phase (i.e. via 08 positive feedback), to the tip and ring leads via 09 driver circuits 5 and 7, through equal valued resistors 19 and 21 respectively. The positive 11 feedback of the received signals to the tip and ring 12 leads serves to cancel the effect of output resistors 13 13 and 15 on the input impedance established by 14 ZIN Resistors 13 and 15 and ZIN provide a nominal balanced line impedance, yet resistors 13 and 16 15 can be made of low resistance for providing a low 17 resistance line current feed.
18 The signals output from amplifier 18 are 19 also applied to inverting and non-inverting inputs of an amplifier 17 via equal valued resistors 35 and 37, 21 and equal valued resistors 39 and 41, and are thus 22 effectively cancelled.
23 A predetermined amount of AC and DC
24 feedback is provided by feedback resistors 10 and 14 connected to driver circuits 5 and 7 respectively.
26 Considering the DC control aspect of the 27 line circuit, a -48 volt DC battery voltage source is 28 applied to the balanced line via driver circuits 5 and 29 7.
Amplifier 17 functions as a DC controller 31 or integrator for monitoring the DC voltage appearing 32 on the tip lead at the terminal Tc, via resistor 43, 33 and comparing the monitored tip lead voltage with a 34 predetermined DC voltage denoted as OFFSET, via resistor 45.
36 Capacitor 38 is connected to the output 37 and inverting input of amplifier 17, and capacitor 40 12~;~027 01 is connected to the non-inverting input and ground, 02 for filtering out AC signals, such as audio, and 03 thereby facilitate DC current control.
04 Amplifier 17 generates a DC bias level 05 signal proportional to the difference in voltage 06 between the monitored line voltage at Tc and the 07 external OFFSET voltage. The DC bias signal is 08 applied equally to inverting and non-inverting inputs 09 of ring and tip driver circuits 7 and 5 via equal valued resistors 47 and 49, respectively, such that a 11 negative feedback path is established for maintaining 12 the DC voltages on the tip and ring leads at the 13 predetermined bias level (controlled by the OFFSET
14 signal), relative to th~ nominal line voltages of 0 volts DC and -48 volts DC, respectively.
16 For example, disregarding the effect of 17 amplifier 18 which introduces a common mode signal to 18 amplifier 17, in the event the OFFSET voltage is set 19 at zero volts, the voltage at the node connecting resistors 37, 41, 45 and 46 is forced to zero volts.
21 Due to negative feedback of the voltage appearing on 22 the tip at the Tc terminal, the voltage at the node 23 connecting resistors 35, 39, 43 and 44 is also forced 24 to zero volts. In other words, the current flowing from the +5 volt source through resistors 44 and 43 26 towards the -2 volt sink provided by the Tc terminal, 27 results in ground potential appearing at the node 28 connecting resistors 35, 39, 43 and 44.
29 Accordingly, the negative feedback path established by amplifier 17 provides DC signal biasing 31 for maintaining the DC line voltage levels on the tip 32 and ring leads at -2 volts DC and -46 volts DC, 33 respectively, in the manner of a constant voltage 34 source.
In the event of excess current being drawn 36 by the tip and ring leads, due to a short line loop 37 length, etc., current limiting is provided for 01 reducing the total metallic current drawn by the tip 02 and ring leads to a predetermined level.
03 In particular, amplifier 18 has inverting 04 and non--inverting inputs connected across line feed 05 resistors 13 and 15 at terminals Tc, Tf, Rc and Rf via 06 equal valued input resistors 51, 53, 55 and 57. A
07 feedback resistor 52 is connected from an output of 08 amplifier 18 to an inverting input thereof in a well 09 known manner. Amplifier 18 senses the metallic current drawn in the tip and ring ~eads by summing the 11 currents flowing through line feed resistors 13 and 12 15, rejecting common mode currents, and in response 13 generating a further DC output voltage signal 14 inversely proportional thereto.
A predetermined DC threshold voltage 16 VsET (eg. -0.8 volts), is applied to the inverting 17 input of amplifier 17 via a diode 5g and input 18 resistor 35 such that in the event the voltage output 19 from amplifier 18 is sufficient to maintain the voltage on the node connecting resistors 37 and 41, 21 and 35 and 39 at approximately 0 volts, diode 59 22 remains reverse-biased, and the further DC voltage is 23 applied equally to the inverting and non-inverting 24 inputs of amplifier 17 via resistors 41 and 37, 39 and 35, so as to be effectively cancelled.
26 However, in the event that the metallic 27 current increases beyond a predetermined threshold, 28 such that the voltage at the node connecting resistors 29 35 and 39 drops below a predetermined voltage equal to the sum of VSET minus the forward voltage drop 31 across diode 59, the inverting input of amplifier 17 32 is maintained at approximately the aforementioned 33 predetermined voltage, and the voltage output from 34 amplifier 18 is applied only to the non-inverting input of amplifier 17, so as to be differentially 36 received and amplified therein.
37 Accordingly, amplifier 17 ceases 38 monitoring only the tip voltage carried by the 3~ - 7 -01 terminal TC ~ and the DC bias signal output from 02 amplifier 17 is adjusted in relation to the detected 03 metallic current, for limiting the metallic current 04 drawn by the tip and ring leads to a predetermined 05 level (eg. 30 millamps) as set by the threshold 06 voltage VSET. In particular, the DC bias voltage is 07 adjusted such that the voltage difference between the 08 line voltages on the tip and ring leads is reduced, 09 thereby maintaining the metallic current at the aforementioned predetermined level (eg. 30 millamps).
11 Thus, when drawing nominal current, the 12 control circuit of Figure 1 provides negative feedback 13 of the line voltage carried by the Tc terminal, for 14 maintaining the voltages on the tip and ring leads at predetermined offset bias voltages from their nominal 16 levels. Upon detection of a metallic current in 17 excess of a predetermined threshold level established 18 by VSETl diode 59 turns on, effectively clamping the 19 voltage on the inverting input of amplifier 17 at X
volts, such that the DC bias signal output therefrom 21 is adjusted in response to the metallic current 22 detected via amplifier 18, thereby maintaining the 23 current at a predetermined level.
24 According to a successful prototype of the invention resistors 43 and 46 were each 200k ohms, 26 resistors 41 and 39 were each 42k ohms, resistors 37 27 and 35 were each 150k ohms, and resistors 44 and 45 28 were each 500k ohms.
29 A comparator 80 has an inverting input connected to the output of differential amplifier 18 31 and a non-inverting input connected to a source of 32 threshold voltage (i.e. -5 volts). As discussed 33 above, differential amplifier 18 detects the flow of 34 metallic current in the tip and ring leads. The signal output from amplifier 18 is monitored in 36 comparator 80 and compared with the threshold voltage 0'~7 01 for detecting changes in line impedance of the tip and 02 ring leads.
03 Thus, in the event of a sudden impedance 04 increase in a remote load (i.e. a central office trunk 05 circuit) connected to the tip and ring leads, 06 decreased metallic current flows in the telephone 07 line. The decreased metallic current flow is detected 08 in differential amplifier 18, causing the comparator 09 80 to generate a control signal designated SHORT.
The SHORT signal output from comparator 80 11 is applied via a differentiating capacitor 86 to the 12 base input of a PNP transistor 88 having a collector 13 terminal thereof connected via pull up resistor 90 to 14 a source of -28 volts DC, and an emitter terminal connected to the base terminal via resistor 92 and to 16 one terminal of the aforementioned integrating 17 capacitor 38 connected between the output of amplifier 18 17 and the inverting input thereof.
19 In the event of sudden changes in the flow of metallic current as a result of sudden impedance 21 changes in the tip and ring lead (due, for example, to 22 the remote trunk circuit switching from a battery 23 and ground feed to loop feed, as discussed above), the 24 change in the output signal from comparator 80 is differentiated via capacitor 86 causing a momentary 26 enabling pulse to be applied to the base of PNP
27 transistor 88. In response, transistor 88 is 28 momentarily enabled, thereby discharging integrating 29 capacitor 38 via the source of discharging potential -28 volts DC through resistor 90.
31 Thus, amplifier 17 quickly compensates for 32 the change in line impedance, whereas in prior art 33 systems the line circuit would have operated in a 34 reduced current mode due to the settling time of integrating capacitor 38.
36 In summary, according to the present 37 invention, a compensation circuit is provided for use 38 _ 9 _ 0~7 01 with an integrating amplifier useful in a DC control 02 circuit of a constant current line circuit. The 03 compensation circuit detects sudden variations or 04 changes in the input signal applied to the integrating 05 amplifier, and in response discharges the integrating 06 capacitor thereby increasing responsiveness of the 07 integrating amplifier in the event of such sudden 08 changes or variations in the input signal.
09 A person understanding the present invention may conceive of further embodiments or 11 variations thereof.
12 For example, while the compensation 13 circuit of the present invention has been described 14 with reference to a particular application for increasing responsiveness of an integrating amplifier 16 used in the DC control circuit of a constant current 17 line circuit, the compensation circuit may be used for 18 other applications as well.
19 All such embodiments and variations are believed to be within the sphere and scope of the 21 present invention as defined by the claims appended 22 thereto.
Claims (6)
EXCLUSIVE PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED
AS FOLLOWS:
1. In a constant current line circuit including tip and ring lead differential driver circuits for generating nominal tip and ring lead battery voltages, and a DC control circuit comprised of amplifier means and integrating capacitor means connected thereacross for monitoring DC voltages carried by said tip and ring leads and in response maintaining DC current flowing in said tip and ring leads at a constant level; the improvement comprising compensation means for detecting a sudden increase in impedance connected to said tip and ring leads and in response momentarily discharging said integrating capacitor means, thereby increasing responsiveness of said DC control circuit in the event of said sudden increase in impedance connected to said tip and ring leads.
2. Compensation means as defined in claim 1, further comprised of differential amplifier means for detecting metallic current flowing in said tip and ring leads, and in response to detection of a sudden decrease in said metallic current flow generating an enable signal; and switch means connected to said differential amplifier means and said integrating capacitor means for receiving said enable signal and in response connecting one terminal of said capacitor means to a source of DC voltage for discharging said capacitor means.
3. Compensation means as defined in claim 1, further comprised of:
(a) a first differential amplifier for detecting metallic current flowing in said tip and ring leads and generating a first DC output signal in response thereto, (b) a second differential amplifier for receiving and comparing said DC output signal with a predetermined threshold signal and generating a further DC output signal in the event said first DC
output signal is in excess of a predetermined threshold level, and (c) transistor switch means having a control input thereof connected via a high pass filtering capacitor to an output of said second differential amplifier, a switching path of said transistor switch means being connected to one terminal of said capacitor means and to a source of DC
discharge potential, whereby said transistor switch means connects said one terminal of said capacitor means to said source of DC discharge potential via said switching path in response to receiving said further DC output signal on the control input thereof.
(a) a first differential amplifier for detecting metallic current flowing in said tip and ring leads and generating a first DC output signal in response thereto, (b) a second differential amplifier for receiving and comparing said DC output signal with a predetermined threshold signal and generating a further DC output signal in the event said first DC
output signal is in excess of a predetermined threshold level, and (c) transistor switch means having a control input thereof connected via a high pass filtering capacitor to an output of said second differential amplifier, a switching path of said transistor switch means being connected to one terminal of said capacitor means and to a source of DC
discharge potential, whereby said transistor switch means connects said one terminal of said capacitor means to said source of DC discharge potential via said switching path in response to receiving said further DC output signal on the control input thereof.
4. In a constant current line circuit including tip and ring lead differential driver circuits for generating nominal tip and ring lead battery voltages, and a DC control circuit comprised of amplifier means and integrating capacitor means connected thereacross for monitoring DC voltages carried by said tip lead and in response generating a predetermined DC bias signal to each of said tip and ring lead driver circuits for maintaining constant DC
current flow through said tip and ring leads; a method for increasing responsiveness of said DC control circuit in the event of a sudden increase in impedance connected to said tip and ring leads, comprising the steps of detecting decreased current flow in said tip and ring leads, and in response momentarily discharging said integrating capacitor means.
current flow through said tip and ring leads; a method for increasing responsiveness of said DC control circuit in the event of a sudden increase in impedance connected to said tip and ring leads, comprising the steps of detecting decreased current flow in said tip and ring leads, and in response momentarily discharging said integrating capacitor means.
5. For use with an integrating amplifier having an integrating capacitor connected between an input and output thereof for monitoring an input signal and generating an integrated output signal in response thereto: compensation means for detecting sudden variations in said input signal and in response momentarily discharging said integrating capacitor, thereby increasing responsiveness of said integrating amplifier in the event of said sudden input signal variations.
6. Compensation means as defined in claim 5, further comprised of:
(a) a comparator for monitoring said input signal and generating one of two possible output enable signals in the event that the amplitude of said input signal is greater than or less than a predetermined threshold level, respectively, (b) a differentiating capacitor connected to said comparator, for receiving said one of two possible enable signals and generating a momentary enabling pulse in response thereto, and (c) a switching circuit connected between said integrating capacitor and a source of discharge potential, a control input of said switching circuit being connected to said differentiating capacitor for receiving said momentary enabling pulse and in response momentarily connecting said integrating capacitor to said source of discharge potential.
(a) a comparator for monitoring said input signal and generating one of two possible output enable signals in the event that the amplitude of said input signal is greater than or less than a predetermined threshold level, respectively, (b) a differentiating capacitor connected to said comparator, for receiving said one of two possible enable signals and generating a momentary enabling pulse in response thereto, and (c) a switching circuit connected between said integrating capacitor and a source of discharge potential, a control input of said switching circuit being connected to said differentiating capacitor for receiving said momentary enabling pulse and in response momentarily connecting said integrating capacitor to said source of discharge potential.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000531660A CA1257027A (en) | 1987-03-10 | 1987-03-10 | Compensation circuit for use with an integrating amplifier |
| US07/157,862 US4800586A (en) | 1987-03-10 | 1988-02-19 | Compensation circuit for use with an integrating amplifier |
| DE3806346A DE3806346A1 (en) | 1987-03-10 | 1988-02-27 | COMPENSATION CIRCUIT IN AN INTEGRATING AMPLIFIER |
| JP5731588A JPH0821995B2 (en) | 1987-03-10 | 1988-03-08 | Compensation circuit for integrating amplifier |
| IT8819710A IT1216040B (en) | 1987-03-10 | 1988-03-09 | COMPENSATION CIRCUIT FOR USE WITH AN INTEGRATOR AMPLIFIER. |
| GB8805580A GB2202413B (en) | 1987-03-10 | 1988-03-09 | Compensation circuit for use with an integrating amplifier |
| GB9101580A GB2238448B (en) | 1987-03-10 | 1991-01-24 | Compensation circuit for use with an intergrating amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000531660A CA1257027A (en) | 1987-03-10 | 1987-03-10 | Compensation circuit for use with an integrating amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1257027A true CA1257027A (en) | 1989-07-04 |
Family
ID=4135138
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000531660A Expired CA1257027A (en) | 1987-03-10 | 1987-03-10 | Compensation circuit for use with an integrating amplifier |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4800586A (en) |
| JP (1) | JPH0821995B2 (en) |
| CA (1) | CA1257027A (en) |
| DE (1) | DE3806346A1 (en) |
| GB (2) | GB2202413B (en) |
| IT (1) | IT1216040B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5050210A (en) * | 1989-03-10 | 1991-09-17 | Reliance Comm/Tec Corporation | Metallic current limiter |
| JP2687656B2 (en) * | 1990-03-16 | 1997-12-08 | 日本電気株式会社 | Subscriber line circuit |
| US5148475A (en) * | 1990-04-06 | 1992-09-15 | Harris Corporation | Reduced contact resistance on a SLIC |
| US5585756A (en) * | 1995-02-27 | 1996-12-17 | University Of Chicago | Gated integrator with signal baseline subtraction |
| DE19623827C1 (en) * | 1996-06-14 | 1998-01-08 | Siemens Ag | Electronic speech circuitry |
| JP3772954B2 (en) * | 1999-10-15 | 2006-05-10 | 株式会社村田製作所 | How to handle chip-like parts |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3885760A (en) * | 1974-03-08 | 1975-05-27 | Bendix Corp | Autopilot radio guidance signal circuit including controlled integrator |
| FR2465275A1 (en) * | 1979-09-10 | 1981-03-20 | Thomson Csf | DEVICE FOR SWITCHING A STORAGE CAPACITOR, INTEGRATOR AND SAMPLE COMPRISING SUCH A PROVITF |
| JPS6244597Y2 (en) * | 1979-12-05 | 1987-11-26 | ||
| US4387273A (en) * | 1980-08-25 | 1983-06-07 | International Telephone And Telegraph Corporation | Subscriber line interface circuit with impedance synthesizer |
| US4365204A (en) * | 1980-09-08 | 1982-12-21 | American Microsystems, Inc. | Offset compensation for switched capacitor integrators |
| CA1181541A (en) * | 1982-05-21 | 1985-01-22 | Mitel Corporation | Loudspeaking telephone |
| US4563547A (en) * | 1983-03-07 | 1986-01-07 | At&T Bell Laboratories | Loop-start/ground-start line interface circuit |
| US4532381A (en) * | 1984-02-13 | 1985-07-30 | Northern Telecom Limited | Active impedance line feed circuit |
| CA1209732A (en) * | 1984-03-12 | 1986-08-12 | Stanley D. Rosenbaum | Active impedance line feed circuit with improved ground fault protection |
| US4581487A (en) * | 1984-07-11 | 1986-04-08 | Itt Corporation | Universal DC feed for telephone line and trunk circuits |
| CA1231480A (en) * | 1985-03-15 | 1988-01-12 | John A. Barsellotti | Constant current line circuit |
-
1987
- 1987-03-10 CA CA000531660A patent/CA1257027A/en not_active Expired
-
1988
- 1988-02-19 US US07/157,862 patent/US4800586A/en not_active Expired - Fee Related
- 1988-02-27 DE DE3806346A patent/DE3806346A1/en active Granted
- 1988-03-08 JP JP5731588A patent/JPH0821995B2/en not_active Expired - Lifetime
- 1988-03-09 IT IT8819710A patent/IT1216040B/en active
- 1988-03-09 GB GB8805580A patent/GB2202413B/en not_active Expired - Lifetime
-
1991
- 1991-01-24 GB GB9101580A patent/GB2238448B/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| GB2238448A (en) | 1991-05-29 |
| IT8819710A0 (en) | 1988-03-09 |
| GB8805580D0 (en) | 1988-04-07 |
| JPS63254851A (en) | 1988-10-21 |
| GB2202413B (en) | 1991-10-23 |
| IT1216040B (en) | 1990-02-22 |
| GB2202413A (en) | 1988-09-21 |
| US4800586A (en) | 1989-01-24 |
| JPH0821995B2 (en) | 1996-03-04 |
| DE3806346A1 (en) | 1988-09-22 |
| GB2238448B (en) | 1991-12-18 |
| DE3806346C2 (en) | 1992-02-06 |
| GB9101580D0 (en) | 1991-03-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |