AU2019258117A1

AU2019258117A1 - Precharging of an intermediate circuit

Info

Publication number: AU2019258117A1
Application number: AU2019258117A
Authority: AU
Inventors: Joachim Danmayr; Roland Jungreithmair
Original assignee: Fronius International GmbH
Current assignee: Fronius International GmbH
Priority date: 2018-04-23
Filing date: 2019-04-23
Publication date: 2020-12-17
Anticipated expiration: 2039-04-23
Also published as: AU2019258117B2; BR112020020160A2; WO2019206910A1; EP3785360A1; EP3562016A1

Abstract

In order to render possible reliable charging of the intermediate circuit capacitors of an inverter (1) which comprises an intermediate circuit (3), a DC/AC voltage bridge (3) and a control unit (5), according to the invention an intermediate circuit voltage (Uz) of the intermediate circuit (3) is precharged in a precharging mode via a capacitive circuit (C), preferably a capacitive voltage divider, by means of a power supply system (4) which is connected to the output.

Description

Precharge of an intermediate circuit

The present invention relates to a method for operating an inverter, which comprises an intermediate circuit, a DC/AC voltage bridge, and a control unit, wherein half bridges of the DC/AC voltage bridge are controlled by the control unit, in order to convert an input DC voltage of a DC voltage side via the intermediate circuit and the DC/AC voltage bridge into an output AC voltage in normal operation mode, wherein the inverter is switched to a precharge mode before the normal operation mode is activated, in which precharge mode an intermediate circuit voltage of the intermediate circuit is precharged to a specified prevoltage. The present invention further relates to an inverter comprising an intermediate circuit, a DC/AC voltage bridge, and a control unit, wherein the control unit is configured to control half bridges of the DC/AC voltage bridge in order to convert an input DC voltage of a DC voltage input stage via the intermediate circuit and the DC/AC voltage bridge into an output AC voltage in a normal operation mode.

A typical inverter converts an input DC voltage into an output AC voltage and thus connects a DC voltage source, which is connected to an input via a DC voltage input stage and a DC/AC voltage bridge on the output, to an AC voltage network, e.g., an n-phase energy supply network. An n-phase output AC voltage can thus be fed into n mains voltages of the energy supply network. The DC/AC voltage bridge is usually formed by two half bridges per phase of the energy supply network, each half bridge comprising two power electronic switches, for example IGBTs or MOSFETs. A first half bridge per phase is used to provide the positive half waves of the AC voltage and a second half bridge is used to provide the negative half waves. An intermediate circuit, which is formed from intermediate circuit capacitors, is usually provided between the DC voltage input stage and the DC/AC voltage bridge. A photovoltaic system in generator mode can serve as a DC voltage source, for example. A filter can also be provided in the inverter on the output side, i.e., upstream of the AC voltage network. Switching elements, for example relays, and/or further filters, for example an EMC filter, can also be provided between the inverter and the AC voltage network.

In the normal operation mode, the inverter is designed to deliver energy from a DC voltage source located at the input to the output and thus to feed it into an AC voltage network. Before starting the normal operation mode of the inverter, however, the intermediate circuit capacitors installed in the intermediate circuit must be precharged to a prevoltage. If the inverter were to be connected directly to the energy supply network at the output without a precharged intermediate circuit, the intermediate circuit capacitors would be charged from the output side via the parasitic diodes of the power electronic switches in the half bridges of the DC/AC voltage bridge. Since the intermediate circuit represents a very low-resistance load in the discharged state, the currents that arise can be so high that the components of the inverter, in particular the power electronic switches, can be damaged. The intermediate circuit capacitors must therefore be precharged to the prevoltage before the power electronic switches of the DC/AC voltage bridge are connected to the energy supply network in normal operation mode.

Known solutions for precharging the intermediate circuit capacitors include using the energy available at the DC voltage input stage. This energy can be made available, for example, by suitably designing the components of the DC voltage source that are connected to the DC voltage input stage. For example, photovoltaic cells are connected in series in order to achieve a sufficiently high input DC voltage, which is then applied as an intermediate circuit voltage to the intermediate circuit capacitors and precharges them. In the case of photovoltaic cells in particular, however, the problem can arise that no or insufficient input DC voltage is generated, which means that precharging would not be possible.

If the available input DC voltage is not sufficiently high, it can be increased using boost converters additionally attached to the inverter in order to generate a sufficiently high intermediate circuit voltage. DE 10 2010 060 633 Al discloses precharging the intermediate circuit of an inverter by coupling it to the DC voltage input side, the intermediate circuit capacitors being precharged to a high value in a first step without additional wiring. The DC voltage input side is then switched off and the voltage drops to a value that roughly corresponds to the desired intermediate circuit voltage. The intermediate circuit voltage is set to the desired value in a subsequent step by operating the inverter in a boost converter operation mode. A sufficient intermediate circuit voltage can thus be achieved without providing an additional inverter. Disadvantageously, however, this method only works if an input DC voltage is applied to the input in the first step, which causes solar radiation. Reliable precharging is therefore only possible when the sun is shining. In addition, the input DC voltage must be sufficient to approximately achieve the desired intermediate circuit voltage, as otherwise the semiconductor switches of the inverters can be damaged again if the intermediate circuit voltage is too low at the beginning of the boost converter operation mode due to the insufficient impedance and the associated high current flows.

External power storage devices, such as rechargeable batteries, can also be used to precharge the intermediate circuit capacitors, especially if there are no DC voltage sources at all, for example if inverters are used to couple AC voltage networks for reactive power compensation. Using external power storage devices to charge the intermediate circuit capacitors, however, harbors the risk that precharging is not possible, since the respective power storage device can be completely discharged or can be in standby mode, for example. This also means that no reliable precharging is possible. Apart from that, an additional power storage device of course means more effort and costs.

It is an object of the present invention to allow reliable charging of the intermediate circuit capacitors of an inverter.

This object is achieved according to the invention in that, in the precharge mode, the intermediate circuit voltage is precharged via a capacitive circuit which forms a current limiting capacitive voltage divider via an energy supply network connected to the output. The object is also achieved by a capacitive circuit, preferably a capacitive voltage divider, via which the intermediate circuit can be connected in a precharge mode to an energy supply network connected to the output in order to precharge an intermediate circuit voltage of the intermediate circuit. Thus, according to the invention, the energy required for the precharging can be obtained from the energy supply network, and there is no dependence on an input side or additionally provided DC voltage source. An external wiring having suitable capacitors, for example, can serve as the capacitive circuit. The capacitive circuit serves as a current-limiting series resistor and can, for example, connect the n phases of the energy supply network, which are connected to the output of the inverter, to the intermediate circuit.

The clock filter and mains filter on the output side are advantageously used as a capacitive circuit. Clock filters and mains filters usually each include clock filter capacitors and mains filter capacitors connected in a star between the phases, which form a current-limiting capacitive voltage divider via which the intermediate circuit capacitors are charged via a charging curve. Without a current limitation, as mentioned at the outset, when connecting the energy supply network to the DC/AC voltage bridge, components, in particular power electronic switches, could be damaged or destroyed, since the intermediate circuit capacitors are initially not sufficiently charged. Using the clock filters and mains filters that are already present, the intermediate circuit capacitors are charged directly, i.e., without additional, external components or series resistors, via the energy supply network. This means that there is no additional hardware expenditure, which means that the total device costs of the inverter can also be reduced and, as a result, the service life can also be increased, since fewer built-in electronic components mean a lower probability of failure. Clock filters and/or mains filters can of course also not be part of the inverter and instead can be formed by connected elements. Of course, despite the use of the clock filter and mains filter as a capacitive circuit, additional wiring can be used, for example to expand the capacitive circuit.

Advantageously, the intermediate circuit voltage is precharged via the capacitive circuit via the energy supply network to a threshold voltage lower than the prevoltage and then half bridges of the DC/AC voltage bridge are clocked by the control unit according to a boost converter, in order to further increase the intermediate circuit voltage via the energy supply network, until the specified prevoltage is reached.

By operating the DC/AC voltage bridge as a boost converter or step-up converter, the precharging of the intermediate circuit capacitor can be controlled via the already existing control unit, thus avoiding additional hardware expenditure.

The threshold voltage can advantageously correspond to a value just below half the peak voltage of the energy supply network and can be set by dimensioning the clock filter and mains filter. The threshold voltage usually cannot quite reach half the peak voltage, since a voltage drop occurs due to the precharging via the capacitive voltage divider, even after a longer charging time.

Advantageously, the intermediate circuit voltage is precharged in a first step via the capacitive circuit via a phase of the energy supply network and the intermediate circuit voltage is further increased in a boost converter operation mode via the capacitive circuit via a phase of the energy supply network, the same phase being used particularly advantageously.

The half bridges of the DC/AC voltage bridge from the control unit can be clocked according to a boost converter by the control unit in order to precharge the intermediate circuit voltage to the specified prevoltage via the energy supply network. This means that there is no need for a previous first step, including precharging to a threshold voltage, and the boost converter operation mode can begin immediately. This is possible because the capacitive circuit via which the DC/AC voltage bridge is connected to the energy supply network has a current limiting effect. Without the capacitive circuit or any other type of current limitation, the boost converter operation mode would damage components in the case of uncharged intermediate circuit capacitors.

In addition, the object is achieved according to the invention by an inverter comprising an intermediate circuit, a DC/AC voltage bridge, and a control unit, wherein the control unit is configured to control half bridges of the DC/AC voltage bridge in order to convert an input DC voltage of a DC voltage input stage via the intermediate circuit and the DC/AC voltage bridge into an output AC voltage in a normal operation mode, wherein the inverter is operated in a precharge mode using the method according to the invention before the normal operation mode is activated.

The present invention is explained in more detail below with reference to Fig. 1 to 10, which show schematic and non-restrictive advantageous embodiments of the invention by way of example. In the figures:

Fig. 1 shows a schematically illustrated inverter,

Fig. 2 shows an inverter with two intermediate circuit capacitors in normal operation mode,

Fig. 3 shows the inverter in precharge mode, Fig. 4a shows an effective circuit for an upper half wave in the first step,

Fig. 4b shows an effective circuit for a lower half wave in the first step,

Fig. 5a shows an effective circuit for an upper half wave in the boost converter operation mode,

Fig. 5b shows an effective circuit for a lower half wave in the boost converter operation mode,

Fig. 6 shows an inverter with an intermediate circuit capacitor in normal operation mode,

Fig. 7 shows the inverter in precharge mode,

Fig. 8a shows an effective circuit for an upper half wave in the first step,

Fig. 8b shows an effective circuit for a lower half wave in the first step,

Fig. 9a shows the effective circuit for an upper half wave in the boost converter operation mode,

Fig. 9b shows the effective circuit for a lower half wave in the boost converter operation mode,

Fig. 10 shows the course of an intermediate circuit voltage in precharge mode.

Fig. 1 illustrates a schematic inverter 1 which connects a DC voltage input stage 20 to an energy supply network 4 via a DC/AC voltage bridge 3. In the DC voltage input stage 20, a capacitive intermediate circuit Z is provided upstream of the DC/AC voltage bridge 3. The energy supply network 4 has n phases, in this case n=3 phases L1, L2, L3, and a neutral conductor N (not shown in Fig. 1). The DC voltage input stage 20 is connected to a DC voltage source 2, for example a photovoltaic system, via an input switch Se and has a first pole A and a second pole B. The first pole A and the second pole B are also connected to the intermediate circuit Z. The intermediate circuit voltage Uz is applied to the intermediate circuit Z, i.e., between the first pole A and the second pole B.

The DC/AC voltage bridge 3 comprises an upper half bridge HB1+, HB2+, HB3+ and an associated lower half bridge HB1-, HB2-, HB3- per phase L1, L2, L3. For n=3 phases, three upper half bridges HB1+, HB2+, HB3+ and three lower half bridges HB1-, HB2-, HB3- are therefore provided, only indicated in Fig. 1. The half bridges HB1+, HB2+, HB3+, HB1-, HB2-, HB3- are controlled in normal operation mode by a control circuit 5 in such a way that an input DC voltage Ue applied to the DC voltage input stage 20 is converted via the intermediate circuit and the DC/AC voltage bridge 3 into an output AC voltage uL1, uL2, uL3 per phase L1, L2, L3. The output AC voltages uL1, uL2, uL3 are then each fed into the mains voltages U1, U2, U3 of the energy supply network 4 in the normal operation mode. According to the invention, however, before the normal operation mode is activated, a precharge mode is activated, in which the intermediate circuit voltage Uz (which corresponds to the input voltage Ue in the normal operation mode) of the intermediate circuit is precharged to a specified prevoltage Uv via a capacitive circuit C via the energy supply network 4, as is schematically indicated by the dashed arrow in Fig. 1.

As a first embodiment, Fig. 2 shows a first possible circuit arrangement of the inverter 1 in greater detail. The intermediate circuit Z of the DC voltage input stage 20 comprises an upper intermediate circuit capacitor C+ and a lower intermediate circuit capacitor C connected in series. The first pole A and the second pole B connect the series connection of the two intermediate circuit capacitors C+, C-, an intermediate circuit center point M being located in this case between the upper intermediate circuit capacitor C+ and the lower intermediate circuit capacitor C-. The upper intermediate circuit capacitor C+ and the lower intermediate circuit capacitor C- thus form the intermediate circuit Z, it of course also being possible for further serial and/or parallel capacitors to be provided in the intermediate circuit. The first pole A is connected to the second pole B via the upper half bridge HB1+, HB2+, HB3+ and the associated lower half bridge HB1-, HB2-, HB3- connected in series, whereby the intermediate circuit voltage Uz is connected in each case to the series connection of the upper half bridges HB1+, HB2+, HB3+ and to the associated lower half bridges HB1-, HB2-, HB3- of each phase n. Between the upper half bridges HB1+, HB2+, HB3+ and the associated lower half bridges HB1-, HB2-, HB3- there are each the first, second and third center points M1, M2, M3.

The upper half bridges HB1+, HB2+, HB3+ in the first embodiment shown in this case each include an upper power electronic switch S11+, S21+, S31+ and a series-connected lower power electronic switch S12+, S22+, S32+, in which, between the upper power electronic switches S11+, S21+, S31+ and the associated lower power electronic switches S12+, S22+, S32+, a first upper center point M1+, a second upper center point M2+, and a third upper center point M3+ is located in each case. In the upper half bridges HB1+, HB2+, HB3+, free wheeling diodes D are arranged parallel to the upper power electronic switches S11+, S21+, S31+ and the lower power electronic switches S12+, S22+, S32+, which are polarized in the direction of the first pole A. The intermediate circuit center point M is also connected via upper diodes D1+, D2+, D3+ to the upper centers M1+, M2+, M3+, which are polarized in the direction of the upper center points M1+, M2+, M3+.

In the first embodiment shown in this case, the lower half bridges HB1-, HB2-, HB3 comprise, in an analogous manner, an upper power electronic switch S11-, S21-, S31- and a series-connected lower power electronic switch S12-, S22-, S32-, in which, between the upper power electronic switches S11-, S21-, S31- and the associated lower power electronic switches S12-, S22-, S32-, a first lower center point Ml-, a second lower center point M2-, and a third lower center point M3- are located in each case. In parallel to the upper power electronic switches S11-, S21-, S31- and the lower power electronic switches S12-, S22-, S32-, free-wheeling diodes D are arranged in each case, in the direction of the associated first, second, or third center point M1, M2, M3, or are polarized in the direction of the first pole A. The lower center points Ml-, M2-, M3- are connected to the intermediate circuit center point M via lower diodes Dl-, D2-, D3-, wherein the lower diodes Dl-, D2-, D3- are polarized in a permeable manner in the direction of the intermediate circuit center point M. The upper diodes D1+, D2+, D3+ and lower diodes Dl-, D2-, D3- are used in normal operation mode of the inverter 1 illustrated in the first embodiment and are therefore already present in the inverter. At least the upper diodes D1+, D2+, D3+ and lower diodes D1-, D2-, D3-, which belong to the phase L1, L2, L3, via which the inverter 1 is connected to the energy supply network 4 in the precharge mode, can therefore also be used as a boost converter in the operation of the inverter 1.

The energy supply network comprises a number n of phases L1, L2, L3, each of which has a phase-shifted mains voltage U1, U2, U3 (for example 230 volts) with a mains frequency f (for example 50 Hz). The output AC voltage uL1, uL2, uL3 is of course synchronized with the mains voltage U1, U2, U3 in order to allow it to be fed into the energy supply network 4. The first phase Li of the energy supply network 4 is preferably connected to the first center point M1 via a first inductance X1 (choke). Similarly, the second phase L2 of the energy supply network 4 is preferably connected to the second center point M2 via a second inductance X2 and the third phase L3 of the energy supply network 4 is preferably connected to the third center point M3 via a third inductance X3. The n=3 phases L1, L2, L3 are also connected to one another via a clock filter TF. The clock filter TF comprises a star connection of at least three clock filter capacitances CF1, CF2, CF3, the star point of the clock filter being connected to the neutral conductor N of the energy supply network. Furthermore, the n=3 phases L1, L2, L3 are connected to one another via a mains filter NF (EMC filter), which, similarly to the clock filter TF, in turn consists of a star connection of at least three mains filter capacitances C41, C42, C43, the star point being connected to the neutral conductor N of the energy supply network 4. The clock filter TF and the mains filter NF do not have to be part of the inverter 1 and can also be designed externally. The clock filters TF and the mains filters NF are used in the present embodiment as capacitive wirings C for precharging the intermediate circuit voltage Uz to the prevoltage Uv. Alternatively or additionally, a different/further capacitive wiring C can of course also be provided in order to create a capacitive series resistor for current limitation during the precharging of the intermediate circuit capacitors C+, C-.

The inverter 2 is connected or disconnected from the supply network 4 via the first, second, and third phase filter switches SF1, SF2, SF3 provided in phases L1, L2, L3 between the clock filter TF and the mains filter NF, and via a neutral filter switch SFN provided in the neutral conductor L between clock filter TF and mains filter NF. If the phase filter switches SF1, SF2, SF3 and the neutral conductor filter switch SFN are open, the DC/AC voltage bridge 3 and thus the inverter are separated from the energy supply network 4.

Furthermore, a first, second, third phase switch S41, S42, S43, and a neutral conductor switch S4N are provided between the mains filter NF and the energy supply network 4, via which the mains filter NF can be connected and/or disconnected from the energy supply network 4. If the phase switches S41, S42, S43, and the neutral conductor switch S4N are open, then clock filter TF and thus also the DC/AC voltage bridge 3 are of course separated from the energy supply network 4.

The upper power electronic switches S11+, S21+, S31+ and lower power electronic switches S12+, S22+, S32+ of the upper half bridges HB1+, HB2+, HB3+, as well as the upper power electronic switches S11-, S21-, S31- and lower power electronic switches S12-, S22-, S32 of the lower half bridges HB1-, HB2-, HB3- can also be controlled via a control circuit 5, which is only indicated in the figures for reasons of clarity.

Since the inverter 1 in Fig. 2 is in normal operation mode, in which the input switch Se is closed, the DC voltage source 2 acts as a generator at the DC voltage input stage 20 and generates an input DC voltage Ue between the first pole A and the second pole B, whereby the input DC voltage Ue corresponds to the intermediate circuit voltage Uz. The phase filter switches SF1, SF2, SF3, or the neutral conductor filter switch SFN, the phase switches S41, S42, S43, and/or the neutral conductor switch S4N are closed, whereby the DC/AC voltage bridge 3 is connected to the energy supply network 4. An input DC voltage Ue corresponds to the intermediate circuit voltage Uz and is applied between the first pole A and the second pole B. The control circuit 5 switches the upper half bridges HB1+, HB2+, HB3+ in such a way that positive half waves are generated at the first, second and third center point M1, M2, M3. The control circuit 5 switches the lower half bridges HB1-, HB2-, HB3- in an analogous manner in such a way that negative half waves are generated at the first, second, and third center points M1, M2, M3. Upper half bridges HB1+, HB2+, HB3+ and the associated lower half bridges HB1-, HB2-, HB3- are each switched alternately. At the first, second and third center points M1, M2, M3, a phase-shifted rectangular AC voltage is produced, which is smoothed via the inductances X1, X2, X3 and is further fed into the associated phases L1,

L2, L3 of the energy supply network 4. These positive and negative half waves of the generated voltages must of course be synchronized by the control circuit 5 to the half waves of the respectively connected phases L1, L2, L3 in order to allow feeding into the energy supply network. The DC/AC voltage bridge 3 thus generates square-wave voltages at the first, second, and third center points M1, M2, M3. By filtering these square-wave voltages via the clock filter TF and mains filter NF, or via the inductances X1, X2, X3, sinusoidal output AC voltages uL1, uL2, uL3 are generated and further fed into the mains voltages U1, U2, U3 of the energy supply network 4. Preferably, the power electronic switches S11+, S21+, S31+ S12+, S22+, S32+, S11-, S21+, S31-, S12-, S22-, S32- of the DC/AC voltage bridge 3 are clocked with a frequency greater than the mains frequency of 50 Hz, for example 20 kHz.

Since the mode of operation of inverters 1 in normal operation mode is well known, it will not be discussed in detail at this point.

As is known, prior to normal operation mode of the inverter 1, the intermediate circuit capacitors C+, C- of the intermediate circuit must be precharged to a suitable intermediate circuit voltage Uz in a precharge mode. According to the invention, this takes place in that the intermediate circuit voltage Uz is precharged to a prevoltage Uv via the energy supply network 4 in the precharge mode, as is shown by way of example in Fig. 3.

This precharge mode can be carried out in two steps, wherein, in a first step, the intermediate circuit voltage Uz is precharged to a threshold voltage Us, of less than a prevoltage Uv, via the energy supply network 4, and subsequently, in a boost converter operation mode, the power electronic switches S11+, S21+, S31+ S12+, S22+, S32+, S11-, S21+, S31-, S12-, S22-, S32- of the inverter 1 are clocked according to a boost converter until the intermediate circuit voltage Uz reaches the specified prevoltage Uv. However, it is also possible to skip the first step and charge the intermediate circuit voltage to the prevoltage Uv purely in boost converter operation mode, without first considering a threshold voltage Us, which can therefore also be regarded as a threshold voltage Us of zero.

During the precharge mode, the DC voltage source 2 cannot be connected to the inverter 1, which is symbolized in Fig. 3 by an open input switch Se. The DC voltage source 2 could, however, also be connected to the inverter 1 via a closed input switch Se. If the input DC voltage Ue is higher than the prevoltage Uv, no precharging is necessary. If the input DC voltage Ue is lower, then a precharging according to the invention can be carried out, whereby a shorter time is of course required for the precharging than if the intermediate circuit voltage Uz had to be charged from zero to the prevoltage Uv.

The precharge mode can take place by means of a switch position, as shown in Fig. 3, the neutral conductor switch S4N on the output side and one of the phase switches on the output side, in this case the third phase switch S43, being closed. The other phase switches, i.e., in this case the first phase switch S41 and the second phase switch S42, are opened. In addition, the front phase filter switches SF1, SF2, SF3 located between the mains filter NF and clock filter TF are closed (if present), but the neutral conductor filter switch SFN remains open. In this switch position, there can be no direct current flow via the parasitic diodes of the power electronic switches S11+, S21+, S31+ S12+, S22+, S32+, S11-, S21+, S31-, S12-, S22-, S32-, and a capacitive voltage divider is the result, which is formed via the mains filter capacitors C41, C42, C43 and the clock filter capacitors CF1, CF2. In the third center point M3, which is connected to the upper intermediate circuit capacitor C+ via the third inductance X3 and the diodes D of the third upper half bridge HB3+, there is thus a sinusoidal voltage which has a frequency according to the mains frequency f. The level of this sinusoidal voltage at the third center point M3 is, however, reduced via the capacitive voltage divider and also out of phase with the mains frequency.

To describe the capacitive voltage divider, the circuit that effectively results in the above switch positions in the first step for positive half waves of the mains voltage U3 of the selected phase L3, shown in Fig. 4a, is the circuit for negative half waves of the mains voltage in Fig. 4b. The open power electronic switches are not shown in Fig. 4a and 4b, but the parallel free-wheeling diodes D, in this case the free-wheeling diodes of the third upper half bridge HB3+ or the third lower half bridge HB3-, since the respective semiconductor switches S31+, S32+, and S31-, S32- are open. It can be seen that the capacitive voltage divider divides the (in this case third) mains voltage U3, which is applied to the third mains filter capacitor C43, into a first partial voltage uT1 and a second partial voltage uT2. The first partial voltage uT1 is applied to the third clock filter capacitor CF3, the second partial voltage uT2 is applied to a parallel connection of two branches. One of the branches is formed from a series connection of the first clock filter capacitor CF1 and the first mains filter capacitor C41 and the other branch is formed from a series connection of the second clock filter capacitor FC1 and the second mains filter capacitor C42. The first partial voltage uT1 is thus applied in the positive half wave via the third coil X3 and the free-wheeling diodes D of the third upper half bridge HB3+ to the upper intermediate circuit capacitor C+ (Fig. 4a). In the negative half wave, the first partial voltage uT1 is applied to the lower intermediate circuit capacitor C- via the third coil X3 and the free-wheeling diodes D of the third lower half bridge HB3- (Fig. 4b). Of course, only one of the branches could also be used for the capacitive voltage divider, which can be achieved in that the first phase filter switch SF1 or the second phase filter switch SF2 is open. In this case, however, the remaining first or second branch would have a higher resistance, so that the capacitive voltage divider is changed and the second partial voltage uT2 becomes greater and thus the first partial voltage uT1 becomes smaller.

There is a continuous flow of current in the direction of the intermediate circuit capacitors C+, C-, the clock filter capacitors CF1, CF2, CF3 having a current-limiting effect. The level of the intermediate circuit voltage Uz that is established depends on the voltage across the clock filter capacitors CF1, CF2, CF3, which in turn depends on the capacitance of the clock filter capacitors CF1, CF2, CF3.

Thus, the intermediate circuit voltage Uz can be precharged up to a threshold voltage Us, which, due to the capacitive voltage divider, does not take place suddenly, but rather according to a charging curve, as shown in Fig. 10.

The threshold voltage Us can correspond to a value just below half the peak voltage of the mains voltage U1, U2, U3 of the energy supply network 4. In the case of an energy supply network 4 with a mains voltage U1, U2, U3 of 230 volts, the peak voltage is 325 V, which results in half the peak voltage of 162.5 V for the threshold voltage Us. Since the theoretically possible threshold voltage Us usually cannot be reached, e.g. due to losses, the threshold voltage Us should be selected to be slightly lower than the maximum possible value, i.e., half the peak voltage, to ensure that the threshold voltage Us is reached and that the boost converter operation mode can be safely activated.

In order to avoid damage to the components, the intermediate circuit voltage Uz for an inverter 1 should usually be charged to a prevoltage Uv, which corresponds to at least twice the peak voltage (here 650 V), before normal operation mode is activated, which takes place in the boost converter operation mode.

If the first step described above is carried out until the intermediate circuit voltage Uz reaches or exceeds a threshold voltage Us, then the second step can be initiated. If the first step is skipped, then, as mentioned, the boost converter operation mode can also be started immediately.

In this boost converter operation mode, the inverter 1 can be connected to a phase L1, L2, L3 of the energy supply network 4, in which power electronic switches S11+, S21+, S31+ S12+, S22+, S32+, S11-, S21+, S31-, S12-, S22-, S32- of the inverter 1 are clocked according to a boost converter until the intermediate circuit voltage reaches the specified prevoltage. The voltage curve of a phase L1, L2, L3 is taken into consideration, and the power electronic switches S11+, S21+, S31+ S12+, S22+, S32+, S11-, S21+, S31-, S12-, S22-, S32- of the half bridge HB1+, HB2+, HB3+ HB1-, HB2-, HB3- associated with the considered phase L1, L2, L3 are synchronously clocked according to a boost converter with the AC voltage uL1, uL2, uL3 on the selected phase L1, L2, L3, as indicated in Fig. 5a and 5b on the control unit 5. In Fig. 5a, it is the circuit that effectively results in the above switch positions in the boost converter operation mode for positive half waves of the mains voltage, and in Fig. 5b it is the circuit for negative half waves of the mains voltage.

In the illustrated embodiment, the voltage profile of the third phase L3 is considered since this was already connected in the first step via the third phase switch S43. The phase filter switches SF1, SF2, SF3, neutral conductor filter switches SFN, phase switches S41, S42, S43, and neutral conductor switch S4N remain in the same position as in the first step, i.e., the neutral conductor switch S4N, and one of the phase switches on the output side, in this case the third phase switch S43, and phase filter switches SF1, SF2, SF3 remain closed, and the neutral conductor filter switch SFN, as well as the first phase switch S41 and the second phase switch S 42 remain open.

The switch position from Fig. 3 can thus also be retained for the second step. If the first phase Li is used in the second step, the first phase switch S41 would of course have to be closed and the second phase switch S42, as well as the third phase switch S43, would have to be opened, and if the second phase L2 is used in the second step, the second phase switch S42 would have to be closed and the first phase switch S41 and the third phase switch S43 would have to be opened. The power electronic switches S31, S32+ of the upper third half bridge HB3+ and the power electronic switches S31-, S32- third lower half bridge HB3- clocked accordingly.

Open power electronic switches are not shown in Fig. 5a and 5b, but the parallel free wheeling diodes D are shown. Closed power electronic switches are also not shown, nor are the parallel free-wheeling diodes because they are short-circuited by the closed power electronic switches. The power electronic switches shown are each clocked with a PWM in Fig. 5a and Fig. 5b.

The clocking process begins during a voltage zero crossing of the selected phase, in this case the third phase L3. The lower semiconductor switch S32+ of the third upper half bridge HB3+ is switched on in the positive half wave of the third phase voltage UL3 at the third phase L3 (therefore not shown in Fig. 5a), accordingly, the lower semiconductor switch S32 and the upper semiconductor switch S31- of the third lower half bridge HB3- is switched off (in Fig. 5a only the parallel free-wheeling diode D is shown) and the upper semiconductor switch S31+ of the upper half bridge HB3+ is clocked by the control unit 5 with a PWM signal PWM with a certain pulse-pause ratio, where the clock frequency of the PWM signal PWM is, for example, 20 kHz. The frequency of the signal resulting from the PWM signal can be derived from the current phase voltage of the associated phase of the energy supply network. The upper semiconductor switch S31- of the third lower half bridge HB3- could, however, also not be switched off, but could be clocked inversely to the upper semiconductor switch S31+ of the upper half bridge HB3+.

In the negative half cycle of the third phase voltage UL3, the lower semiconductor switch S32+ and the upper semiconductor switch S31+ of the third upper half bridge HB3+ are switched off (in Fig. 5b only the parallel free-wheeling diode D is therefore shown), the lower semiconductor switch S32- of the lower third half bridge HB3- is switched on (in Fig. 5b therefore not shown), and the upper semiconductor switch S31- of the lower third half bridge HB3- is also clocked by the control unit 5 with a PWM signal PWM with a pulse-pause ratio, in which the frequency can in turn be derived from the current value of the associated third phase voltage U3. The upper semiconductor switch S31+ of the third upper half bridge HB3+ does not have to be switched off, but can also be clocked inversely to the lower semiconductor switch S31- of the upper half bridge HB3+.

The power electronic switches S31+ S31- are thus clocked in a synchronized manner with the sinusoidal voltage present at the third center point M3, whereby a square-wave voltage is generated at the third center point M3. The current flow into the intermediate circuit can be regulated via the duty cycle of the PWM, the duty cycle being derived from the amplitude of the voltage at the third center point M3, a suitable scaling factor being selected for the amplitude. A self-stabilizing control loop is generated by this boost converter operation mode. It is necessary that the current flowing into the intermediate circuit is not higher than the current flowing through the capacitive voltage divider, since otherwise the voltage at the third center point M3 would collapse. Thus, the duty cycle is automatically reduced when the voltage at the third center point 3 decreases or increases when the voltage at the third center point increases. In terms of control technology, the scaling factor corresponds to a P component and limits the maximum current. As a result of the switching pattern described, the DC/AC voltage bridge 3 behaves like a boost converter and energy from the supply network 4 or from the mains voltage U3 of the selected phase, in this case the third phase L3, is taken in and charged into the intermediate circuit capacitors C+, C- in a controlled manner, which results in a further increase in the intermediate circuit voltage Uz.

The method described can of course not only be used in an inverter 1 with two intermediate circuit capacitors C+, C- and a tapped center point M, as is the case with the first embodiment illustrated above, but also in an analogous manner, e.g., for an inverter 1 with only one intermediate circuit capacitor Cz in the intermediate circuit Z. Such an inverter 1 is illustrated in this case as a second embodiment as a B6 bridge inverter, Fig. 6 showing the normal operation mode and Fig. 7 showing the precharge mode. The intermediate circuit Z can of course also have a plurality of intermediate circuit capacitors Cz in this case, but no center point M is tapped.

As in the first embodiment, the first pole A is connected to the second pole B via the upper half bridge HB1+, HB2+, HB3+ and the associated lower half bridge HB1-, HB2-, HB3 connected in series, whereby the intermediate circuit voltage Uz is connected in each case to the series connection of the upper half bridges HB1+, HB2+, HB3+ and to the associated lower half bridges HB1-, HB2-, HB3- of each phase n. The first, second and third center points M1, M2, M3 are likewise located between the upper half bridges HB1+, HB2+, HB3+ and the associated lower half bridges HB1-, HB2-, HB3-. The upper half bridges HB1+, HB2+, HB3+ in the second embodiment of the inverter 1 each have only one power electronic switch S1+, S2+, S3+ with parallel free-wheeling diodes D, which are polarized in the direction of the first pole A. In other words, there are no series-connected lower power electronic switches S12+, S22+, S32+ and thus no upper center points M1+, M2+, M3+.

Since the neutral conductor is not connected to any center point M, and there are no upper center points M1+, M2+, M3+, no upper diodes D1+, D2+, D3+ and lower diodes D1-, D2-, D3- are provided either.

The lower half bridges HB1-, HB2-, HB3- include in an analogous manner a power electronic switch S1-, S2-, S3- with free-wheeling diodes D arranged parallel to them, which are polarized in a permeable manner in the direction of the associated first, second, or third center point M1, M2, M3. There are also no lower center points Ml-, M2-, M3- and no lower diodes Dl-, D2-, D3-.

In normal operation mode according to Fig. 6, the input switch Se is closed. The DC voltage source 2 generates an input DC voltage Ue between the first pole A and the second pole B, whereby the input DC voltage Ue corresponds to the intermediate circuit voltage Uz. The phase filter switches SF1, SF2, SF3, or the neutral conductor filter switch SFN, the phase switches S41, S42, S43, and/or the neutral conductor switch S4N are closed, whereby the DC/AC voltage bridge 3 is connected to the energy supply network 4. An input DC voltage Ue corresponds to the intermediate circuit voltage Uz in normal operation mode and is applied between the first pole A and the second pole B. The control circuit 5 switches the upper half bridges HB1+, HB2+, HB3+ in such a way that positive half waves are generated at the first, second and third center point M1, M2, M3. The control circuit 5 switches the lower half bridges HB1-, HB2-, HB3- in an analogous manner in such a way that negative half waves are generated at the first, second, and third center points M1, M2, M3. Upper half bridges HB1+, HB2+, HB3+ and the associated lower half bridges HB1-, HB2-, HB3- are each switched alternately. The mode of operation in normal operation mode is basically the same as in the first embodiment.

The precharging of the intermediate circuit capacitor Cz to a prevoltage Uv takes place just as fundamentally as in the first embodiment in the precharge mode, which in turn can be done in two steps. In a first step, the intermediate circuit voltage Uz is precharged to a threshold voltage Us, of less than the prevoltage Uv, via the energy supply network 4, and subsequently, in a boost converter operation mode, the power electronic switches S1+, S2+, S3+ S1-, S2-, S3- (in this case, only six) of the inverter 1 are clocked according to a boost converter until the intermediate circuit voltage Uz reaches the specified prevoltage Uv.

However, it is also possible to skip the first step and charge the intermediate circuit voltage to the prevoltage Uv purely in the boost converter operation mode, without first considering a threshold voltage Us.

During the precharge mode, the DC voltage source 2 can be connected to the inverter as in the first embodiment, or it can also be separated, as symbolized in Fig. 7 by an open input switch Se.

The precharge mode of the second embodiment can be activated with the same position of the phase filter switches SF1, SF2, SF3, or the neutral conductor filter switch SFN and the phase switches S41, S42, S43, or the neutral conductor switch S4N, as in the first embodiment, to form a capacitive voltage divider.

The capacitive voltage divider results for positive half waves of the mains voltage as shown in Fig. 8a and for negative half waves as illustrated in Fig. 8b. Analogously to the first embodiment, the intermediate circuit voltage Uz can thus be precharged up to the threshold voltage Us.

If the first step is carried out until the intermediate circuit voltage Uz reaches or exceeds a threshold voltage Us, then the second step can be initiated. If the first step is skipped, the boost converter operation mode can be started immediately.

In this boost converter operation mode, the inverter 1 can be connected to a phase L1, L2, L3 of the energy supply network 4. In contrast to the first embodiment, however, the power electronic switches S1-, S2+, S3+ of all upper half bridges HB1+, HB2+, HB3+ clock synchronously, according to the boost converter, with the mains voltage of the selected phase, in this case the third mains voltage U3 of the third phase L3, until the intermediate circuit voltage Uz reaches the specified prevoltage Uv. Open power electronic switches are not shown in Fig. 9a and 9b, but the parallel free-wheeling diodes D. The respective power electronic switches shown are each clocked with a PWM in Fig. 9a and Fig. b.

During the upper half wave, the power electronic switches S1-, S2-, S3- of the lower half bridges HB1-, HB2-, HB3- can be counter-clocked or opened against the power electronic switches S1+, S2+, S3+ of all upper half bridges HB1+, HB2+, HB3+-the latter case is illustrated in Fig. 9a in that only parallel free-wheeling diodes D are shown. In the negative half cycle of the third phase voltage UL3, the semiconductor switches S1-, S2-, S3- of the lower half bridges HB1-, HB2-, HB3- are clocked according to a PWM and the power electronic switches S1+, S2+, S3+ of all upper half bridges HB1+, HB2+, HB3+ are counter clocked or opened against the power electronic switches S1-, S2-, S3- of the lower half bridges HB1-, HB2-, HB3--the latter case is illustrated in Fig. 9b in that only parallel free wheeling diodes D are shown.

The switch position from Fig. 6 is also retained in this case for the boost converter operation mode by way of example. If the first phase Li is used in the second step, the first phase switch S41 would of course have to be closed and the second phase switch S42, as well as the third phase switch S43, would have to be opened, and if the second phase L2 is used in the second step, the second phase switch S42 would have to be closed and the first phase switch S41 and the third phase switch S43 would have to be opened.

For all embodiments, the DC/AC voltage bridge 3 is clocked like a boost converter in the boost converter operation mode. Since the function of a boost converter is known, this mode of operation will not be discussed in more detail at this point. Energy from the supply network 4 or from the mains voltage U3 of the selected phase, in this case the third phase L3, is therefore taken in and charged into the intermediate circuit capacitors Cz, C+, C- in a controlled manner, which results in a further increase in the intermediate circuit voltage Uz.

The applied intermediate circuit voltage Uz is compared with a specified prevoltage Uv. If the intermediate circuit voltage Uz reaches or exceeds the prevoltage Uv, the boost cycle process shown above is ended and the inverter 3 is connected to the energy supply network 4. This is done in the usual way by closing the phase filter switches SF1, SF2, SF3, the neutral conductor filter switch SFN, the phase switches L41, L42, L43 and the neutral conductor switch L4N, as shown in Fig. 2 and Fig. 6. Furthermore, at the beginning of normal operation mode, the control unit 5 can be synchronized with the energy supply network 4 in the usual way and then both the conversion of the input DC voltage Ue made available by the DC voltage source 4 into the output AC voltage uL1, uL2, uL3 and the feed can be started in the energy supply network 4.

Fig. 10 shows the course of the intermediate circuit voltage Uz, which is precharged in a first step up to the threshold voltage Us and then further charged in boost converter operation mode up to the prevoltage Uv.

The inverter 1 shown in the illustrated embodiment is designed for an energy supply network 4 with n=3 phases L1, L2, L3. Of course, energy supply networks 4 with a different number n of phases can also be connected to an input DC voltage Ue via an inverter 1 according to the invention and the method according to the invention can be used.

Claims

1. Method for operating an inverter, which comprises an intermediate circuit, a DC/AC voltage bridge, and a control unit, wherein half bridges (HB1+, HB2+, HB3+, HB1-, HB2-, HB3-) of the DC/AC voltage bridge are controlled by the control unit in order to convert an input DC voltage (Ue) of a DC voltage input stage via the intermediate circuit (Z) and the DC/AC voltage bridge into an output AC voltage (uLl, uL2, uL3) present at an output in normal operation mode, wherein the inverter is switched to a precharge mode before the normal operation mode is activated, in which precharge mode an intermediate circuit voltage (Uz) of the intermediate circuit (Z) is precharged to a specified prevoltage (Uv), characterized in that the intermediate circuit voltage (Uz) is precharged in the precharge mode via a capacitive circuit (C), which forms a current-limiting capacitive voltage divider, via an energy supply network connected to the output.

2. Method according to claim 1, characterized in that clock filters (TF) and mains filters (NF) on the output side serve as capacitive circuits (TF, NF).

3. Method according to claim 1 or 2, characterized in that the intermediate circuit voltage (Uz) is precharged in a first step via the capacitive circuit via the energy supply network to a threshold voltage (Us) of less than the prevoltage (Uv) and in that subsequently, in a boost converter operation mode, half bridges (HB1+, HB2+, HB3+, HB1-, HB2-, HB3-) of the DC/AC voltage bridge are clocked by the control unit according to a boost converter, in order to further increase the intermediate circuit voltage (Uz) via the power supply network, until the specified prevoltage (Uv) is reached.

4. Method according to claim 3, characterized in that the intermediate circuit voltage (Uz) is precharged via the capacitive circuit (C) via a phase (L1, L2, L3) of the energy supply network, and in that the intermediate circuit voltage (Uz) is further increased via the capacitive circuit (C) via a phase (L1, L2, L3) of the energy supply network.

5. The method according to claim 3, characterized in that the intermediate circuit voltage (Uz) is precharged to the threshold voltage (Us) via the same phase (L1, L2,L3) and further increased to the prevoltage (Uv).

6. Method according to claim 3 or 5, characterized in that the threshold voltage (Us) corresponds to a value just below half the peak voltage of the mains voltage (U1, U2, U3) of the energy supply network.

7. Method according to claim 1 or 2, characterized in that in a boost converter operation mode, half bridges (HB1+, HB2+, HB3+, HB1-, HB2-, HB3-) of the DC/AC voltage bridge are clocked by the control unit according to a boost converter, in order to precharge the intermediate circuit voltage (Uz) via the energy supply network up to the specified prevoltage (Uv).

8. Inverter comprising an intermediate circuit (Z), a DC/AC voltage bridge, and a control unit, wherein the control unit is configured to control half bridges (HB1+, HB2+, HB3+, HB1-, HB2-, HB3-) of the DC/AC voltage bridge in order to convert an input DC voltage (Ue) of a DC voltage input stage via the intermediate circuit (Z) and the DC/AC voltage bridge into an output AC voltage (uL1, uL2, uL3) in normal operation mode, characterized in that a capacitive circuit (C), which forms a current-limiting capacitive voltage divider, is provided, via which, in a precharge mode, the intermediate circuit (Z) can be connected to an energy supply network which is connected to the output, in order to precharge an intermediate circuit voltage (Uz) of the intermediate circuit (Z).