AU2005297572B2

AU2005297572B2 - Modulation of a PFC during DC operation

Info

Publication number: AU2005297572B2
Application number: AU2005297572A
Authority: AU
Inventors: Dietmar Klien; Peter Lampert
Original assignee: Tridonicatco GmbH and Co KG
Current assignee: Tridonicatco GmbH and Co KG
Priority date: 2004-10-20
Filing date: 2005-10-05
Publication date: 2012-03-15
Anticipated expiration: 2025-10-05
Also published as: CN101044798A; EP1803336B1; WO2006042640A2; AU2005297572A1; EP1803336A2; DE102004051162B4; WO2006042640A3; CN101044798B; DE102004051162A1; ZA200703566B

Abstract

Disclosed is a device for operating illumination means, especially an electronic ballast (EVG) for gas discharge lamps, comprising a power factor correction circuit (PFC) for reducing harmonic oscillations when accepting input current, current being accepted at the input end only during predetermined intervals (t). The predetermined interval (t) during which current is accepted is modulated when a DC voltage is applied at the input end.

Description

- 1 MODULATION OF A PFC IN DC OPERATION FIELD OF THE INVENTION Embodiments of the invention relate to methods for the operation of an operating device for illumination means, such as for example an electronic ballast (EVG) for gas 5 discharge lamps. The operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, which is constituted for example in the form of a switching regulator (up converter) with a clocked switch. Further, embodiments of the invention relate to a computer software programme product for providing such a method, on a control component, which can provide for such a 10 method by programming and/or hard wiring, as well as to an operating device for illumination means. BACKGROUND OF THE INVENTION Any discussion of the prior art throughout the specification should in no way be considered as an admission that such prior art is widely known or forms part of common 15 general knowledge in the field. As stated, the embodiments of the invention relate to operating devices for illumination means which have PFC circuits. Such an operating device, known from the DE 10128588 Al, is illustrated in Fig. 1. More precisely, the device illustrated in Fig. I is an electronic ballast (EVG). This ballast illustrated in Fig. 1 is connected on the input 20 side to a mains supply voltage Uo via a high frequency filter 1. The output of the high frequency filter 1 is connected to a rectifier circuit 2 in the form of a full bridge rectifier. The supply alternating voltage rectified by the rectifier circuit 2 represents at the same time the input voltage Ui for the smoothing circuit 3. This is formed in the present example by a smoothing capacitor Cl as well as an up converter having an inductance 25 LI, a controllable switch in the form of a MOS field effect transistor SI 2 and a diode Dl. Instead of the up converter also other switching regulators can be used. The PFC circuit is formed by the selection of the control of the switch Sl. 5 By appropriately switching the MOS field effect transistor Sl there is generated in per se known manner (see for example also WO 99/34647 Al) an intermediate circuit voltage Uz, applied to the storage capacitor C2 10 arranged thereafter, which is delivered to the inverter 4. The inverter 4 is formed in the present example by two further MOS field effect transistors S2 and S3 arranged in a half bridge arrangement. By high frequency switching of these two switches S2 and S3 a 15 high-frequency alternating voltage is generated at their middle tap which is delivered to the load circuit 5 with the gas discharge lamp LA connected thereto. The operation of this up converter is already known in 20 principle and therefore shall solely be summarized briefly in the following. If the field effect transistor Sl is conducting, the current rises in the inductance Ll linearly. If, however, the field effect transistor Sl blocks, the current discharges itself 25 into the storage capacitor C2. The energy take up of the up converter can be influenced by a specific control of the switch Sl, and therewith also the intermediate circuit voltage (bus voltage) Uz applied to the storage capacitor C2. 30 The control of the switch Sl of the up converter is effected by a control circuit 6 which generates corresponding switching information and transmits this 3 to a driver circuit 7 connected to the control circuit 6. In turn this converts the switching information into corresponding power control signals and controls via the line 14 the gate of the field effect transistor Sl. 5 In the same way signals are generated by the control circuit 6 and the driver circuit 7 also for control of the two field effect transistors S2 and S3 of the inverter 4. All components of the control unit 6 can for example be synchronized via a central timing 10 generator 8, which transmits corresponding timing signals to them. The control unit 6 is formed as an application specific integrated circuit (ASIC) and correspondingly only takes up little space. 15 Calculation of the switching information for the switch Sl of the up converter is effected by a digital control system 9 arranged within the control circuit 6. For this purpose the control circuit 2 has analog/digital converters ADCi and ADC 2 , which convert into digital 20 values the input voltage Ui delivered via the input line 15 and the intermediate circuit voltage Uz delivered via the input line 16. The computation block 12 serves to calculate a suitable 25 switch-on time for the switch Sl based on the current value of the intermediate circuit voltage Uz. However, before a control signal is generated for the switch Sl on the basis of the switch-on time determined by the computation block 12, the switch-on time is 30 supplemented (prolonged) by an additional value which is determined by the switching time prolongation block 13. For this purpose the switching time prolongation block 13 has a memory with a table, which associates a 4 certain time interval with each value of the input voltage U 1 by which the switch-on time of the switch Sl is extended. The value of this additional interval is added, as stated, to the switch-on time calculated by 5 the computation block 12 and transmitted to an output block 11. This generates corresponding switching information which is delivered to the driver circuit 7 which then finally transmits to the switch Sl a corresponding control signal via the line 14. 10 In the most general way the relationship between the switch-on time prolongation and the input voltage consists in that the switch-on time prolongation is the larger the lower the input voltage Ui is. In 15 particular, thus the switch-on time prolongation will be effected in the area of the zero crossings of the sinusoidal alternating voltage which is applied at the input. 20 The described circuit known from the state of the art is well suited for AC operation; after all, the switch on time prolongation is effected in dependence upon a detection of the zero crossings of the applied sinusoidal alternating voltage Uo. 25 In general however, with the application of a DC voltage to such a circuit the one switch-on period prolongation is inoperative. The application of a DC voltage is effected for example in emergency operation. 30 The known circuit thus works without switch-on time prolongation and therefore with a constant frequency in emergency operation. This fixed working frequency of the power factor correction circuit (PFC) 3 therefore -5 generates interference with a substantially fixed frequency. This can give rise problems with the electromagnetic compatibility regulations, which also apply to emergency lighting operation (DC operation). SUMMARY OF THE INVENTION 5 It is an object of the present invention to overcome or ameliorate at least one of the disadvantages of the prior art, or to provide a useful alternative. It is an object of an embodiment of the invention to improve the electromagnetic compatibility in DC operation. This means that in accordance with one or more embodiments of the invention the 10 circuit known from Fig. I can further be used for AC operation. Meanwhile, it is proposed in accordance with other embodiments of the invention to modulate the working frequency of the PFC in DC operation, in order - so to speak - to "dilute" the interference spectrum of the circuit towards side bands outside the middle working frequency. This makes a compliance with the electromagnetic compatility regulations 15 possible. The modulation may thereby lay in a change of the modulation depth, (i.e. prolongation/shortening of the switch-on time of the clocked switch) and/or change of the switching frequency. According to an aspect of the invention there is provided a method for the operation of an operating device for illumination means, in particular an electronic ballast (EVG) for 20 gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, wherein the application of a DC voltage without zero crossings at the input of the operating device is detected, the working frequency of the power factor correction circuit is modulated upon 25 application of a DC voltage without zero crossings on the input side, the modulation of the power factor correction circuit (PFC) is effected by means of a timing generator controlling the reading out from a look-up table, and switching to modulation by means of the timing generator and look-up table takes place automatically as soon as the application of a DC voltage without zero crossings is 30 recognized by the operating device.

- 5a According to another aspect of the invention there is provided a method for the operation of an operating device for illumination means, in particular an electronic ballast (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, which is 5 constituted as a switching regulator with a clocked switch (S1), wherein the application of a DC voltage without zero crossings at the input of the operating device is detected, and the switch-on time period (tON) and/or the switching frequency of the switch (S1) is modulated upon input side application of a DC voltage without zero crossings, 10 the modulation of the power factor correction circuit (PFC) is effected by means of a timing generator controlling the reading out from a look-up table, and switching to modulation by means of the timing generator and look-up table takes place automatically as soon as the application of a DC voltage without zero crossings is recognized by the operating device. 15 According to a further aspect of the invention there is provided a computer software programme product, wherein it provides for a method according to any preceding aspect when it runs on a computation device in an operating apparatus or is implemented by hard wiring. According to a further aspect of the invention there is provided an operating device for 20 illumination means, in particular an electronic ballast (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, wherein means for the detection of the application of a DC voltage without zero crossings at the input of the operating device are provided, 25 the working frequency of the power factor correction circuit is modulated upon application of a DC voltage without zero crossings on the input side, the modulation of the power factor correction circuit (PFC) is effected by means of a timing generator controlling the reading out from a look-up table, and switching to modulation by means of the timing generator and look-up table 30 takes place automatically as soon as the application of a DC voltage without DC crossings is recognized by the operating device.

- 5b According to yet another aspect of the invention there is provided an operating device for illumination means, in particular an electronic ballast (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, which is constituted as a switching 5 regulator with a clocked switch (SI), wherein the switch-on time period (tON) and/or the switching frequency of the switch (S1) is modulated upon input side application of a DC voltage without zero crossings, the modulation of the power factor correction circuit (PFC) is effected by means of a timing generator controlling the reading out read out from a look-up table, and 10 switching to modulation by means of the timing generator and look-up table takes place automatically as soon as the application of a DC voltage without zero crossings is recognized by the operating device. The features included with the dependent claims further develop the central concept of the invention in particularly advantageous way. 15 DESCRIPTION OF PREFERRED EMBODIMENT In accordance with an embodiment of the invention there is thus provided a method for the operation of an operating device for illumination means, in particular an electronic ballast 6 (EVG) for gas discharge lamps. The operating device thereby has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take up. The working frequency of the power factor 5 correction circuit is modulated upon application of a DC voltage at the input side. The power factor correction circuit (PFC) can be constituted in the form of a switching regulator with a 10 clocked switch. For the reduction of interference the switch can be so clocked that its switch-on period and/or its switching frequency is modulated upon the application of a DC voltage at the input side. 15 The modulating frequency of the power factor correction circuit (PFC) can thereby be selected such that the output voltage of the power factor correction circuit (PFC) sets an appropriate level of ripple. In other words the modulation of the PFC circuit is not 20 controlled by the circuit itself nor an inter-bus regulation. Rather, the compensation of this "ripple" in the bus voltage (i.e. the intermediate circuit voltage which is provided by the power factor correction circuit and applied to the storage 25 capacitor) is effected for holding constant of the power consumption of the illumination means by means of frequency variation of the inverter. The control unit can for this purpose detect in a manner known per se an operating parameter, such as for example the lamp 30 current and the lamp voltage, and depending on this detection and a deviation from a desired value vary the frequency of the inverter.

7 The modulating frequency of the power factor correction circuit can be selected for example in a region between 15 Hz and 500 Hz, preferably between 90 and 130 Hz. As is known in the state of the art the modulation is 5 linked with the zero crossings of the alternating voltage so that a modulating frequency of 100 Hz (Europe) or 120 Hz (USA) can be provided. With the invention, in contrast, the modulating frequency is freely adjustable and optimizable. 10 Of course, upon application of a DC voltage the modulation can no longer be triggered by zero crossings of the input voltage. In accordance with the invention it can therefore be provided that the modulation of the 15 PFC circuit is effected by means of a timer circuit, by means of which values are read out from a look-up table. These values are, as in the case of the state of the art, prolongation values, which are applied to the actual regulator value TONRegulator of the control 20 circuit. The regulator value TONRegulator is the thereby the switch-on time duration for the switch, which was calculated by a regulator for holding constant the output voltage of the PFC. 25 In accordance with the invention it can be switched over automatically to modulation by means of the timer circuit and the look-up table as soon as the operating device recognizes the application of a DC voltage. In principle, the automatic recognition of emergency light 30 operation (application of a DC voltage) is already known from EP 490329 Bl. Reference is made to Fig. 4 there, reference signs C25 and R21.

8 The power factor correction circuit (PFC) can be operated in the so-called limit mode ("borderline mode"). 5 In accordance with the invention there is further provided a computer software programme product which provides for such a method when it runs on a computation device in an operating apparatus or is implemented by hard wiring (ASIC). 10 Further, in accordance with the invention there is also provided a control component (microcontroller, ASIC etc.) for an illumination means operating device which is configured for providing for such a method. 15 The invention finally also proposes an operating device for illumination means. Further features, aspects and advantages of the present 20 invention will now be made clear with reference to the explanation of an exemplary embodiment. In the accompanying Figures there is shown: Fig. 1 a circuit known from the state of the art (DE 25 101 28 588 Al), and Fig. 2 a circuit in accordance with the invention. It is to be understood that in accordance with the 30 invention the circuit of Fig. 1 can be retained for the AC operation. Fig. 2 shows only those components which are necessary for an operation with AC mains voltage. Otherwise, in the two Figures, those components which 9 have the same reference signs correspond to one another. To improve the interference spectrum of the circuit 5 also in emergency operation (DC mains operation) the circuit in accordance with the invention has, as illustrated into Fig. 2, a control circuit 6 which recognizes the application of an AC or DC voltage by means of a signal 15, which reproduces the rectified 10 input voltage Uj, and a circuit 20. Thereby there can for example be employed a circuit which is in principle known from Fig. 4 of EP 490329 Al. This DC recognition circuit 20 controls a timing generator 8. This timing generator 8, so to speak, replaces the zero crossings 15 of the mains voltage no longer available with DC voltage. The timing generator 8 therefore controls the reading out from a look-up table of the prolongation values for the switch-on time period of the switch Sl. 20 As is in principle known from the state of the art, in accordance with the invention, if appropriate, also the bus voltage Uz is measured and fed back to the control unit 6 (bus voltage signal 16), in order - through variation of the switching frequency of the switch Sl 25 to regulate the bus voltage to desired value UREF Thus, the regulation of the bus voltage yields a regulation value TONRegulator for the switch-on and switch-off period of the switch, which regulation value TONRegulator in accordance with the invention is acted 30 upon with an additional value TONADD changing periodically also in DC operation, to modulate the modulation depth and/or the switching frequency for the improvement in the interference spectrum.

10 This regulation of the bus voltage Uz by means of detection of the bus voltage 16 and by the control system 9 is relatively slow in comparison with the modulating frequency or change of the switch-on time 5 period ton of the switch Sl so that this modulation in the bus voltage Uz is not compensated and the bus voltage will have, in comparison to the switching frequency of the switch Sl, a low-frequency ripple. 10 This ripple of the bus voltage is compensated for by the feedback of a parameter 19 reproducing the illumination means power (illumination means voltage, illumination means current, detection of the illumination power via an optical sensor or the like) 15 as actual value and the control of the switching frequency of the inverter 4 for holding constant the illumination means power to a predetermined desired value. 20 In accordance with the invention the additional values Ton-add read out from the look up table are loaded into a flash memory of the ASIC 6. These Ton_add values of the switching time prolongation block 13 are then added by the regulator 12 to the normal TonRequIator: 25 on Tonadd + TonRegulator Each Ton index is thereby set for a settable time period (a "sweep value") and then the next index is 30 selected from the look-up table. Through change of the sweep value the modulating frequency can be set.

Claims

1. Method for the operation of an operating device for illumination means, in particular an electronic ballast (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the 5 input current take-up, wherein the application of a DC voltage without zero crossings at the input of the operating device is detected, the working frequency of the power factor correction circuit is modulated upon application of a DC voltage without zero crossings on the input side, 10 the modulation of the power factor correction circuit (PFC) is effected by means of a timing generator controlling the reading out from a look-up table, and switching to modulation by means of the timing generator and look-up table takes place automatically as soon as the application of a DC voltage without zero crossings is recognized by the operating device. 15

2. Method for the operation of an operating device for illumination means, in particular an electronic ballast (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, which is constituted as a switching regulator with a clocked switch (SI), wherein 20 the application of a DC voltage without zero crossings at the input of the operating device is detected, and the switch-on time period (tON) and/or the switching frequency of the switch (SI) is modulated upon input side application of a DC voltage without zero crossings, the modulation of the power factor correction circuit (PFC) is effected by means 25 of a timing generator controlling the reading out from a look-up table, and switching to modulation by means of the timing generator and look-up table takes place automatically as soon as the application of a DC voltage without zero crossings is recognized by the operating device.

3. A method according to claim 1, wherein the working frequency is prolonged or 30 shortened by values read out from the look-up table. - 12

4. A method according to claim 2 wherein the switch-on time period (tON) and/or the switching frequency of the switch (Si) is prolonged or shortened by values read out from the look-up table.

5. Method according to any preceding claim, wherein the modulating frequency of 5 the power factor correction circuit (PFC) is selected such that in the output voltage of the power factor correction circuit (PFC) a non-compensated ripple arises.

6. Method according to claim 5, wherein the ripple of the output voltage is compensated, for holding constant of the power of the illumination means, in a following illumination means regulation circuit. 10

7. Method according to claim 6, wherein the illumination means regulation circuit compensates for the ripple of the delivered output voltage by variation of the working frequency of the illumination means.

8. Method according to any preceding claim, wherein 15 the modulating frequency of the power factor correction circuit (PFC) is chosen in a region between 50 Hz and 500 Hz, preferably 90 Hz to 130 Hz.

9. Method according to any preceding claim, wherein the power factor correction circuit (PFC) is operated in so-called limit mode.

10. Computer software programme product, wherein 20 it provides for a method according to any one of the preceding claims when it runs on a computation device in an operating apparatus or is implemented by hard wiring.

11. Control component for an illumination means operating device, wherein it is configured to provide for a method according to any of claims I to 9. 25

12. Operating device for illumination means, in particular an electronic ballast (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, wherein - 13 means for the detection of the application of a DC voltage without zero crossings at the input of the operating device are provided, the working frequency of the power factor correction circuit is modulated upon application of a DC voltage without zero crossings on the input side, 5 the modulation of the power factor correction circuit (PFC) is effected by means of a timing generator controlling the reading out from a look-up table, and switching to modulation by means of the timing generator and look-up table takes place automatically as soon as the application of a DC voltage without DC crossings is recognized by the operating device. 10

13. Operating device for illumination means, in particular an electronic ballast (EVG) for gas discharge lamps, wherein the operating device has a power factor correction circuit (PFC) for the reduction of harmonics at the input current take-up, which is constituted as a switching regulator with a clocked switch (S 1), wherein the switch-on time period (tON) and/or the switching frequency of the switch (SI) 15 is modulated upon input side application of a DC voltage without zero crossings, the modulation of the power factor correction circuit (PFC) is effected by means of a timing generator controlling the reading out read out from a look-up table, and switching to modulation by means of the timing generator and look-up table takes place automatically as soon as the application of a DC voltage without zero 20 crossings is recognized by the operating device.

14. Operating device according to any of claims 12 or 13, wherein means for the detection of the application of a DC voltage at the input of the operating device are provided, and the modulating frequency of the power factor correction circuit (PFC) is selected 25 such that in the output voltage of the power factor correction circuit (PFC) a corresponding ripple arises.

15. Operating device according to claim 14, wherein the output voltage subject to ripple is delivered to an illumination means regulation circuit, which varies the operating frequency of the illumination means for 30 holding constant of the power of the illumination means.

16. Operating device according to any of claims 12 to 15, wherein - 14 the modulating frequency of the power factor correction circuit (PFC) is chosen in a region between 50 Hz and 500 Hz, preferably 90 Hz to 130 Hz.

17. Operating device according to any of claims 12 to 16, wherein the modulation of the power factor correction circuit (PFC) is effected by means 5 of a timer circuit, by means of which values are read out from a look-up table.

18. Operating device according to claim 17, wherein switching to modulation by means of timer circuit and look-up table takes place automatically upon application of a DC voltage.

19. Operating device according to any of claims 12 to 18, wherein 10 the power factor correction circuit (PFC) is constituted for operation in so-called limit mode.

20. A method substantially as herein described with reference to any one of the embodiments of the invention illustrated in the accompanying drawings and/or examples. 15

21. A computer programme software product substantially as herein described with reference to any one of the embodiments of the invention illustrated in the accompanying drawings and/or examples.

22. A control component substantially as herein described with reference to any one of the embodiments of the invention illustrated in the accompanying drawings and/or 20 examples.

23. An operating device substantially as herein described with reference to any one of the embodiments of the invention illustrated in the accompanying drawings and/or examples.