ATE122809T1 - TRUTH VALUE FLOW PROCESSING UNIT. - Google Patents
TRUTH VALUE FLOW PROCESSING UNIT.Info
- Publication number
- ATE122809T1 ATE122809T1 AT89122466T AT89122466T ATE122809T1 AT E122809 T1 ATE122809 T1 AT E122809T1 AT 89122466 T AT89122466 T AT 89122466T AT 89122466 T AT89122466 T AT 89122466T AT E122809 T1 ATE122809 T1 AT E122809T1
- Authority
- AT
- Austria
- Prior art keywords
- truth
- bus
- truth value
- valued
- functions used
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N5/00—Computing arrangements using knowledge-based models
- G06N5/04—Inference or reasoning models
- G06N5/048—Fuzzy inferencing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N7/00—Computing arrangements based on specific mathematical models
- G06N7/02—Computing arrangements based on specific mathematical models using fuzzy logic
- G06N7/04—Physical realisation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S706/00—Data processing: artificial intelligence
- Y10S706/90—Fuzzy logic
Abstract
A truth-valued-flow processing unit according to the invention comprises truth value generator circuits (TG1 - TG3), truth-valued-flow inference units (TVFI1 - TVFI7), a truth value converter (13), a first bus (15) and a second bus (16). The first bus is provided in a number equal to the number of kinds of input variables. Each of the first buses comprises a number of lines equal to the number of kinds of a plurality of predetermined functions used by the antecedents of implications. The second bus comprises a number of lines equal to the number of kinds of a plurality of predetermined functions used by the consequents of implications. The truth value generator circuit is provided in a number equal to the number of kinds of input variables. Each truth value generator circuit is connected at an output side thereof to a corresponding one of the first buses, generates truth values, which correspond to an applied input variable, with regard to a plurality of functions used by the antecedents of implications, and outputs the truth values on the corresponding first bus. The truth-valued-flow inference unit is provided in a number equal to the number of a plurality of functions used by the consequents of implications. Each truth-valued-flow inference unit is connected at an input side thereof to all of the first buses and at an output side thereof to one line of the second bus, selects, from all truth values outputted by the plurality of truth value generator circuits and inputted thereto via the first buses, prescribed ones of the truth values in accordance with predetermined rules and subjects these truth values to a prescribed operation, thereby generating a truth value that is to act upon the corresponding consequent and outputting the truth value on the second bus. The truth value converter causes the truth values outputted by the plurality of truth-valued-flow inference units and inputted thereto via the second bus to act upon each of the plurality of functions used by the consequent, thereby providing an output representing inferential results.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63307697A JP2775447B2 (en) | 1988-12-07 | 1988-12-07 | Processing unit based on truth value flow |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE122809T1 true ATE122809T1 (en) | 1995-06-15 |
Family
ID=17972140
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT89122466T ATE122809T1 (en) | 1988-12-07 | 1989-12-06 | TRUTH VALUE FLOW PROCESSING UNIT. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5142664A (en) |
EP (1) | EP0373492B1 (en) |
JP (1) | JP2775447B2 (en) |
CN (1) | CN1043578A (en) |
AT (1) | ATE122809T1 (en) |
DE (1) | DE68922707T2 (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04256130A (en) * | 1991-02-08 | 1992-09-10 | Nissan Motor Co Ltd | Arithmetic circuit for fuzzy control |
EP0509796A3 (en) * | 1991-04-15 | 1993-05-12 | Mikuni Corporation | Defuzzifier circuit |
JPH04335432A (en) * | 1991-05-10 | 1992-11-24 | Omron Corp | Method and device for generating membership function data and method and device calculating adaptation |
JPH0827816B2 (en) * | 1991-09-13 | 1996-03-21 | 日本電気株式会社 | Fuzzy three-stage reasoning system |
JPH0628501A (en) * | 1992-07-10 | 1994-02-04 | Rohm Co Ltd | Fuzzy inference unit |
JP2850082B2 (en) * | 1993-03-31 | 1999-01-27 | モトローラ株式会社 | Min-max arithmetic circuit for fuzzy inference |
DE59402937D1 (en) * | 1993-09-20 | 1997-07-03 | Siemens Ag | ARRANGEMENT FOR DECODING AND EVALUATION FOR A FUZZY INTERFERENCE PROCESSOR WITH HIGH RESOLUTION |
US5841948A (en) * | 1993-10-06 | 1998-11-24 | Motorola, Inc. | Defuzzifying method in fuzzy inference system |
EP0675431A1 (en) * | 1994-03-31 | 1995-10-04 | Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Method for memorizing membership functions in a fuzzy logic processor |
JP4794059B2 (en) * | 2001-03-09 | 2011-10-12 | 富士通セミコンダクター株式会社 | Semiconductor device |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH061498B2 (en) * | 1985-10-22 | 1994-01-05 | オムロン株式会社 | Programmable multi-member ship function circuit |
JPH0682396B2 (en) * | 1985-10-22 | 1994-10-19 | オムロン株式会社 | Membership function synthesizer and fuzzy system |
JPH0786893B2 (en) * | 1986-11-13 | 1995-09-20 | オムロン株式会社 | Fuzzy information processing equipment |
-
1988
- 1988-12-07 JP JP63307697A patent/JP2775447B2/en not_active Expired - Lifetime
-
1989
- 1989-12-04 US US07/445,532 patent/US5142664A/en not_active Expired - Fee Related
- 1989-12-06 EP EP89122466A patent/EP0373492B1/en not_active Expired - Lifetime
- 1989-12-06 CN CN89109099A patent/CN1043578A/en active Pending
- 1989-12-06 DE DE68922707T patent/DE68922707T2/en not_active Expired - Fee Related
- 1989-12-06 AT AT89122466T patent/ATE122809T1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JP2775447B2 (en) | 1998-07-16 |
EP0373492B1 (en) | 1995-05-17 |
DE68922707T2 (en) | 1996-02-22 |
DE68922707D1 (en) | 1995-06-22 |
US5142664A (en) | 1992-08-25 |
JPH02155042A (en) | 1990-06-14 |
EP0373492A3 (en) | 1992-08-05 |
CN1043578A (en) | 1990-07-04 |
EP0373492A2 (en) | 1990-06-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |