AT500545A1 - INVERTER WITH TWO ASYMMETRIC HALF BRIDGE SWITCHES - Google Patents

Description

5 1 ► ♦ · < I ···· · ♦ 10 15 20

The invention relates to an inverter with two asymmetric half-bridge circuits, which alternately drive two separate primary windings of a main transformer in which a current doubler rectifier is connected to the secondary winding of the main transformer.

The trend in inverter construction is increasingly towards smaller dimensions and lighter weights. At the same time, the requirements are increased in many aspects. Thus, the harmonic content of the mains current must meet more and more stringent legal standards. This requires a considerable effort, increases the weight and the volume of the entire device. The more the efficiency of the power electronics has to be improved. An exemplary prior art is given in Scripture: "Design and Experimental Analysis of a 10kW 5 2 • · · ·« · · · ···· * ♦ · · · ·· ···· • · · · 800V / 48V Dual Interleaved Two-Transistor DC / DC Forward Converter System 10 Supplied by a VIENNA Rectifier I " by Johann Miniböck, Johann W. Kolar and Hans Ertl. This paper was distributed as part of a public seminar presentation at the PCIM conference in Nuremberg in 2002.

On page 10, a basic circuit according to the preamble of this invention 15 is shown. It is already mentioned in the text that the two inverter systems - which are connected in series here - probably influence each other because they only work on a single transformer. Any voltage that is fed into a primary winding will transfer to the other half-bridge system as well and will try to interfere with it. The realized circuit in this document from page 2o 1 does not know these problems, since it has separate transformers. This circuit also operates at a moderate switching frequency of 25 kHz and is planned as a 48V power supply for telecommunications equipment. However, in order to save the weight, size and cost of a second transformer, the authors suggest a circuit on page 10. 25

Now, if an inverter is needed, which should work with significantly higher switching frequency, so there are new problems. High switching frequencies are e.g. in the impulse welding technique, since the inverter must produce controlled extremely fast current patterns in a controlled manner, e.g. over 1000A / ms. At the same time, extremely rapid control is required because arc short circuits occur unpredictably and in chaotic sequence during welding, so that the output power can fluctuate within fractions of a millisecond around ranges of 95% full load. For such high dynamic requirements it is necessary to achieve high 5 3 5 3 »· · · · · ··· ♦ * ···· • · ·· ·

Switching frequencies and for this purpose are advantageously used type 10 MOSFET transistors.

An attempt has now been made to use MOSFETs in a circuit for a welder. There were enormous problems associated with the fact that MOSFET transistors have a parasitic diode inversely to the transistor. If one of the half-bridge circuits goes into so-called freewheeling operation, that is the state in which the primary winding of the main transformer breaks down its magnetization via the freewheeling diodes, then the inverse freewheeling diodes start to conduct in the second inverter, with a high dv / dt shortly thereafter. Loading of the MOSFET takes place. This is a typical situation in which a MOSFET is in the "second break down" state. can go and this must be prevented under all circumstances. The circuit described on page 10 is therefore not safe to operate with MOSFETs.

In certain limits just before the full scale of the inverter, there were still significant problems with saturation phenomena in the main transformer.

Conventional control with pulse width modulated drive signals caused the magnetizing current to oscillate in borderline situations. At the same time, the PWM system was too slow in speed when short circuits occurred.

The object of the invention is to further develop an inverter circuit in many aspects so that they operate with MOSFET transistors. It is possible to control the magnetizing currents in the main transformer cleanly, to achieve extremely fast regulation without transformer saturation, and to be able to fulfill all the requirements placed on a welding apparatus.

This object is achieved according to the invention in that with each primary winding of the main transformer, a saturable inductance is connected in series 15.

The inverter can be divided into parallel subsystems, the symmetry of the current distribution is always guaranteed, found a balancing system for the capacitive midpoint in series connection of the half-bridge circuits who-2o can, the rules of harmonics in the mains current can be maintained, the inverter system to the higher Performance areas is feasible and a modular system is realized to meet the requirements of the market flexibly. 25 For a welding machine, the weight is an outstanding size. With this design of the circuit, the smoothing reactors can be kept small and for very high powers, subsystems constructed in this way can be operated in parallel. Further developments of the basic circuit can be found in the numerous subclaims, which deal in particular with the division of the inverter into a plurality of small partial inverters and the phase-shifted operation of the same. The control structure of the partial and overall system has also been improved and the repercussions on the supply network reduced. 35 ························································.

Mft ···· • I Μ · 5

When operating such an inverter system with very small currents, the so-called intermittent operation can begin, with both subsystems no longer clocking strictly alternately. In a series connection of the half-bridge circuits occurs a shift of the center of the power supply, which can lead to destruction of the subsystems. On the other hand, a further education indicates a solution.

Particularly low-feedback conditions and much quieter curves are formed when connected in series with the output diodes of the current doubler rectifier ever a second saturable inductance.

A particularly simple realization arises when the first and second saturable inductors are formed by toroidal cores through which the respective current conductor leads.

Particularly effective and thermally advantageous is when the ring core of the saturable inductance is made of amorphous or nanocrystalline strip material.

Particularly small and cost-effective toroidal cores can be used if the toroidal cores of the saturable inductors are installed heat-conducting in bores of cooling profiles or heat transfer profiles in order to improve the heat dissipation considerably.

A particularly advantageous embodiment of the inverter system provides that in each case a connection of the two primary windings together so by a current 5 6 • · ················································································· ··· ·························································································································································································

A significant increase in the control stability in borderline cases arises when this current transformer is a compensating current transformer with a magnetic field sensor, which can also measure resulting DC components. 15

A further embodiment with many advantages arises when the inverter system has a cascade control, with a main controller using the output current value of the output current or the output voltage from the output of the power unit and with the aid of the setpoint of the output current 20 or the output voltage as needed Realized current regulator or a voltage regulator and wherein the output signal of this main regulator is supplied as a guide signal to a controller, which is realized as a current-mode controller for the primary current of the main transformer. 25 A system with both control systems is created when the main controller contains both a current regulator and a voltage regulator, which are linked together in a detachment circuit in such a way that in each case the controller receiving the smaller command signal receives the command. 3o In the design of the controller, there is also the advantageous way that the main controller is designed as a digital controller with the usual means of processor technology and that the analog command signal is generated via a D / A converter Ver-drive to power it Setpoint signal to the current mode controller. 35 5 7; ::.

• · · · · · ·

In order to continue to use the bipolar signal of the current transformer, the primary current actual value of the compensation current transformer is rectified in an advantageous manner to form the primary current actual value amount for the current-mode regulator with an absolute value generator.

A very simple and inexpensive structure of the common-mode regulator ent-15 is by an oscillator with a downstream pulse generator generates drive pulses, by means of which one of the flip-flop memory associated with the half-bridge inverter associated with the half-bridge inverter alternately set and reset and that the respective setting or resetting of these flip-flop memories with the aid of downstream drive circuits leads to turning on or turning off the transistors of the associated half-bridge circuit.

In continuation, it is advantageous if the current-mode regulator has a comparator at the input, which compares the primary current-actual value amount with the amplitude of the reference signal, and that the flip-flop memory is reset when the actual value is greater , so that ultimately the two transistors of the respective active half-bridge circuit are turned off again.

Depending on the level of the mains power supply, it is good if the two asymmetrical half-bridge circuits can be fed from the same supply voltage.

At higher mains voltages, however, it is advantageous if the two asymmetrical half-bridge circuits are connected with their supply voltages in series 35. 5 8 ♦ # · · ♦ · ··· · ··· ♦ · · ··················································································

A particularly stable behavior of the overall system, especially with a minimum of 10 power draws arises when a series circuit of the half-bridge circuits, a monitoring circuit measures the symmetry of the capacitive center terminal with respect to the positive supply voltage and the negative supply voltage and that the output signal of this monitoring circuit indicates the asymmetric behavior with the information of the i5 direction of asymmetry.

Furthermore, it helps in this case if the output signal of the monitoring circuit is used to block or shorten the drive pulses of that half-bridge circuit which has the smaller supply voltage, 20 until the symmetry of the supply voltages is restored.

For the construction of larger inverter systems, there is the advantageous way that two half-bridge circuits and a main transformer (provided possibly, with the first saturable inductors) and a current transformer and a current Verpler doppler rectifier (provided possibly, with the second additional saturable inductors ) are combined into one service section.

An even more extensive modularization arises when a power unit together with a drive transformer and with drive circuits and with a current-mode controller are combined to form a subsystem.

Inverter systems with very high output powers can now be realized by connecting several subsystems in parallel and that the reference variable at the input of the current mode controller is identical for all subsystems, 35 and is generated by a common main controller for the entire system

• · · MM · I ·· I where the output current actual value represents the current of the entire system.

A dramatic reduction of the ripple on the output current is achieved by sharing the oscillator with a downstream pulse generator for all in a parallel connection of several subsystems and that the setting of the flip-15 flop memory for the various half-bridge circuits is divided into as many phase-offset times, so the resulting ripple of the output current is minimal.

A particularly advantageous combination for compliance with the statutory upper-20 wave regulations on the supply network is created by the power part at the terminals of the positive supply voltage and the negative supply voltage is connected upstream of a known boost converter circuit and a power rectifier to control the power consumption from the supply network can. 25

For the same reasons, it is extremely advantageous that the upstream boost converter circuit itself is realized by a parallel connection of several boost converter circuits smaller power. 3o In order to achieve the same power distribution, it is provided that the setpoint signal for the input current of the individual boost converter circuits is identical for all. 5 10 • · · · · ····················································································

A particularly economical solution that is advantageous from the point of view of EMC arises when the individual step-up converter circuits operate in a phase-shifted clock, so that the ripple of the input current is thereby reduced.

A component reduction and more stable EMC conditions arise when the clock generation system for the subsystems and the clock generation for the boost converter circuits are synchronized with each other and can be derived from a single common oscillator and a common pulse generator.

A cost reduction can also be achieved in this inverter system by virtue of the fact that the four transistors of the two half-bridge circuits are driven by a single drive transformer which has a primary winding and four separate secondary windings.

Very high switching frequencies can be achieved in that the transistors 25 of the half-bridge circuits are of the MOSFET type.

Further assembly advantages and simpler spare parts management arise when a power unit with an upstream boost converter circuit are combined mechanically as a module assembly, so that by directly connecting in parallel 3o several such module assemblies power components high overall performance can be realized.

An advantageous standardization arises when each of these module assemblies has its own cooling profile. 35 5

• · · · · · · · · · · • · · · · · · · · ** • · · '· · ♦ · ♦ · ι · «· 11

These features can be combined in a wide range, depending on the required use of the inverter system.

In the field of welding technology, it is particularly advantageous to operate many smaller power parts in phase offset with each other, because thereby the weight of the required throttles is greatly reduced. This is especially important with 15 portable machines. When operating inverters on the three-phase three-phase network of 3x400 V, a series connection of the half-bridge circuits is very advantageous, because with the use of MOSFET transistors, the current carrying capacity decreases drastically with increasing dielectric strength, resulting in more economical solutions since transistors with half the dielectric strength can be used ,

By combining most of these features, an inverter system has been created that achieves high output in a very small space with low weight. Of particular note is the unprecedented high control dynamics and 25 ripple poverty of an inverter of this size and weight class. The rules of harmonic components are fully satisfied. The modular system provides great economic benefits.

The invention will be explained in more detail with reference to an exemplary embodiment shown in the drawings. Show it:

Fig. 1 shows the basic circuit of a power unit according to the invention, 5 12 W W mm m m > «| • · · · · · "··" "* · • · · · · · · · ♦" 9 · · • · · · # «| «·· Itl ♦ ·· ·· ··«

2 shows the control structure of an inventive inverter system, 10

3 shows a possible parallel connection of the half-bridge modules,

Fig. 4 shows a possible series connection of the half-bridge modules, 15 Fig. 5 shows an inverter system with upstream boost converter circuit and

Mains rectifier as well

Fig. 6 shows an example of a module assembly. 20

In Fig. 1 it can be seen how a first half-bridge circuit 1a is constructed. Two transistors 10a and 10b are connected together with two freewheeling diodes 11a and 11b in a known manner to a so-called balanced half-bridge circuit. The supply is connected to a positive supply connection 33 and 25 to a negative supply connection 34 and is supported by a buffer capacitor 43a. It can be seen that the main transformer 3 has two primary windings 3a and 3b. The first primary winding 3a is now installed in the bridge diagonal of the half-bridge circuit 1a, wherein a saturable inductor 5a is connected in series with the primary winding. Furthermore, the primary current flows through a current transformer 4, which generates a primary current actual value 42.

The second half-bridge circuit 1b is constructed in a completely analogous manner as shown. It should only be noted that the primary winding 3b and the current transformer 4 are connected as shown, so that the magnetization of the transformer 3 3. And the current in the current transformer 4 in the case of conducting transistors 10a and 10b in the io half-bridge circuit 1a is opposite to that in the case of conducting transistors 10c and 10d in the half-bridge circuit 1b. At the secondary winding 3c now known per se power doubler rectifier 6 is connected. The standard circuit consists of two smoothing reactors 9a and 9b, each of which carries half of the output current. Two output diodes 7a and 7b serve for rectification. With the two output diodes, the two additional saturable inductors 8a and 8b are connected in series. The whole arrangement is referred to as power section 2.

In Fig. 2, the power unit 2 is shown as a block. It is now the regulation 20 described for it. A main controller 13 realizes a current regulator 20 or a voltage regulator 21 as required. The current regulator 20 is supplied with the output current actual value 16 by a known current measuring system. At the same time, it receives an output current setpoint value 18 from a higher instance. The voltage regulator 21 receives the output voltage actual value 17 and an output voltage setpoint value 19. If both a current regulator 20 and a voltage regulator 21 are required at the same time, a known per se is known and schematically illustrated detachment circuit 39 is provided which gives the controller to the controller which generates the smaller guide signal 14. The guide signal 14 is a new current setpoint for a known current-mode regulator 15. For 3o current-mode control, a very fast and precise primary current-actual value amount 22 is required. For this purpose, the bipolar primary current actual value 42 is rectified from the current transformer 4 in an absolute value generator 23. The guide signal 14 and the primary current-actual value amount 22 are guided in the current-mode regulator 15 to a comparator 27. Each half-bridge circuit 1a or 1b is associated with a respective flip-flop memory 26a or 26b, which leads via a drive circuit 28a or 28b and a drive transformer 12 to the transistors of the associated half-bridge circuit 1a or 1b. If e.g. the flip-flop memory 26a set, then the transistors 10a and 10b of the half-bridge circuit 1a are turned on - the same applies vice versa and mutatis mutandis for the other flip-flop memory 26b in connection with the half-bridge circuit 1b.

The switching on and off of the flip-flop memories 26a and 26b concerns a pulse generator 25, which is fed by an oscillator 24. The two flip-flop memories 26a and 26b are alternately set and reset with a maximum of 50% duty cycle. However, if the comparator 27 determines that the primary current-actual value amount 22 exceeds the command signal 14, the flip-flop memories are immediately reset without any delay. As a result, the power flow in the main transformer 3 is immediately interrupted. The current limitation of the inverter system thus reacts without principle-related delay, since a delay-free image of the output current is contained in the primary current. When connecting several subsystems 49 in parallel, it is now particularly advantageous to provide the oscillator 24 and the pulse generator 25 together only once and for all subsystems 49, since the phase position of the individual half-bridge circuits can be fanned out further and the ripple of the output current of the overall system thus drastically reduced can be.

In Fig. 3, the parallel connection of the two half-bridge circuits 1a and 1b is shown. This variant is advantageous in the operation of inverters on the single-phase supply network of 230V suitable. In contrast to FIG. 3, a series connection of the two half-bridge circuits 1 a and 1 b is shown in FIG. 4. It creates a capacitive

Center point 32, which comes to lie in the middle between the positive supply terminal 33 and the negative supply terminal 34. In order to be able to stably hold center 32 at each operating point of the inverter in the middle, it is advantageous to have a monitoring circuit 29 for the symmetry of the two 15 partial voltages 40a and 40b. Shown is an embodiment with two resistors 30a and 30b and two optocouplers 31a and 31b. The optocoupler 31a becomes conductive when the supply voltage 40a is larger, the optocoupler 31 becomes conductive accordingly when the supply voltage 40b becomes larger. With the output signals 35 of the current-mode controller 15 is controlled so 20 that with known means the drive signals of those half-bridge circuit 1 a or 1 b are blocked, which has the lower supply voltage 40.

FIG. 5 shows that a power converter circuit 36, which is known per se, is connected upstream of the power supply 2 between the positive supply terminal 33 and the negative supply terminal 34. This in turn is supplied by a mains rectifier 37 via the positive rectifier terminal 45 and the negative rectifier terminal 46. The rectifier itself feeds from utility grid 38, which is typically a single-phase network of e.g. 30 230V or as shown a three-phase network of eg. 3x400V is. In the parallel circuit of several subsystems 49, it is now particularly advantageous to connect the guide signal 14 and the setpoint signal for the input current 41 in parallel to all subsystems 49, so that the power distribution to the subsystems is optimal. 35 16

• · · IM · · · · · · · · · · 000 000 ··· 0 0 0 0 • 0 0000000 • · 0 0 0 0 0 0 0 5

FIG. 6 shows a module assembly 44, which consists of a power section 2o and an associated boost converter circuit 36. Such module assemblies can now be easily connected in parallel with the control technology according to the above features, which can be realized with very high output inverter.

Vienna, the -7. May 2003 15

Claims (16)

• · · · · · i dr. Mütiner > lng. Katschinka OEG, Patent Attorney Weihburggasse 9 1010 Vienna 2l / Ö 40339 • · M ESS Welding GmbH D-88339 Bad Waldsee (DE ') Claims: 46 inverters with two asymmetrical half-bridge circuits (1a, 1b), alternately two separate primary windings (3a, 3b) of a main transformer (3), in which a current doubler rectifier (6) is connected to the secondary winding (3c) of the main transformer (3), characterized in that each primary winding (3a, 3b) of the main transformer ( An inverter according to claim 1, characterized in that the current doubler rectifier (6) has two output diodes (7a, 7b), each having a saturable additional inductance Inverter according to Claim 1 or 2, characterized in that the saturable inductors (5a, 5b) and additional inductors (8a, 8b) are designed as toroidal cores (8a, 8b) ebildet are passed through the associated conductor. 30 inverter according to claim 3, characterized in that the ring cores consist of amorphous or nanocrystalline strip material. Inverter according to claim 3 or 4, characterized in that the toroidal cores are incorporated in heat-conducting recordings of cooling profiles or heat transfer bodies. Inverter having two asymmetrical half-bridge circuits (1a, 1b) which alternately drive two separate primary windings (3a, 3b) of a main transformer (3) in which a current doubler rectifier (6) is connected to the secondary winding (3c) of the main transformer (3). is connected, characterized in that each one connection of the two primary windings (3a, 3b) are guided by a current transformer (4) that this emits a sum current with alternating polarity. Inverter according to claim 6, characterized in that the current transformer (4) is designed as a compensation current transformer with a magnetic field sensor and detects resulting DC components. Inverter having two asymmetrical half-bridge circuits (1a, 1b) which alternately drive two separate primary windings (3a, 3b) of a main transformer (3) in which a current doubler rectifier (3) is connected to the secondary winding (3c) of the main transformer (3). 6) is connected, characterized in that it is provided with a cascade controller, wherein a first main controller (13) in dependence of the actual value (16) of the output current or the output voltage of a power part (2) and in dependence of the set value (18) of the output current or the output voltage forms a current regulator (20) or a voltage regulator (21), the output signal of which can be supplied to a further regulator as a control signal of the main regulator (13), acting as current-mode regulator (15) for the primary current of the main transformer (3 ) (Fig. 2). An inverter according to claim 8, characterized in that the main regulator (13) comprises both a current regulator (20) and a voltage regulator (21), which are linked in a detachment circuit (30) so that the one takes over the leadership, which the small command signal (14) generated. Inverter according to claim 8 or 9, characterized in that the main controller (13) is constructed as a digital controller with commercial means of processor technology and that the output analog control signal (14) via a digital-to-analog converter generates as a current setpoint to the current mode Controller (15) is zu-guidable. 5 4 •······································································· 11. Inverter according to one of claims 8 to 10, io characterized in that the formation of the amount (22) of the actual value of the primary current for the current-mode regulator (15) of the actual value (42) of the primary current from the compensation current transformer (4 ) is rectified with an absolute value generator (23). 12. Inverter according to one of claims 1 to 11, characterized in that each half-bridge circuit (1a, 1b) is associated with an oscillator (24) with a downstream pulse generator (25) to drive pulses for associated flip-flop memory (26a, 26b) which are alternately set and reset 2o, and that with the setting and resetting of these flip-flop memory (26a, 26b) downstream drive circuits (28a, 28b), the switching transistors (10) of the associated half-bridge circuit (1a 1b) a - and are switched off. 13. Inverter according to one of claims 8 to 12, characterized in that a comparator (27) forms the input of the current-mode regulator (15) that the comparator (27) the amount (22) of the actual value of the primary current 30 with the amplitude of the reference signal (14) compares, and that the predominant amount (22) of the actual value of the primary current, the flip-flop memory (26a, 26b) resets and the transistors (10) of the respective active half-bridge circuit (1a, 1b) turns off. 5 5 f 10 15 20 25 • · «« • • • • • • • • • • • • • • • • • • · · « 14. Inverter according to one of claims 1 to 13, characterized in that a common supply voltage (40) feeds both half-bridge circuits (1a, 1b9, Fig. 3) 15. Inverter according to one of Claims 1 to 13, characterized in that each one Half bridge circuit (1a, 1b) is associated with a separate supply voltage (40a, 40b) and that the two supply voltages (40a, 40b) are connected in series (Figure 4) 16. Inverter according to Claim 15, characterized in that the series circuit of Supply voltages (40a, 40b) is associated with a monitoring circuit (29) which measures the symmetry of the capacitive center terminal (32) with respect to the positive supply voltage (33) and the negative supply voltage (34), and that the output signal (35) of the monitoring circuit (29) characterizes the asymmetry and the direction thereof 3. Inverter according to claim 16, characterized in that the output signal (35) of the monitoring circuit (29 ) the drive pulses of that half-bridge circuit (1a, 1b), which is fed by the currently smaller supply voltage (40a or 40b), 5 6 5 6 • · · • · · · ·················· It is restored or shortened until the symmetry of the supply voltages (40a, 40b) has been restored. 18. An inverter comprising two asymmetrical half-bridge circuits (1a, 1b) which alternately drive two separate primary windings (3a, 3b) of a main transformer (3) in which a current doubler is connected to the secondary winding (3c) of the main transformer (3) Rectifier (6) is connected, characterized in that two half-bridge circuits (1a, 1b) and a main transformer (3), possibly provided with the saturable inductors (5a, 5b), and a current transformer (4) and a current doubler Rectifier (6), possibly 20 provided with the saturable additional inductors (8a, 8b), to the power Stung part (2) are summarized. 19. Inverter according to claim 18, characterized in that a power unit (2) with a drive transformer (12), drive circuits (28) and a current-mode regulator (15) form a subsystem (49). 20. Inverter according to claim 19, 3o characterized in that a plurality of subsystems (49) are connected in parallel (terminals 33 and 34) and have a common output (terminals 47 and 48), and 5 7 • · · ····· That the guide signal (14) to the inputs of all the current-mode controller (15) io the subsystems (45) is fed, said identical guide signal (14) is generated by a common main controller (13) of the overall system and the Actual value (16) of the output current represents the current of the entire system. 21. Inverter according to one of claims 12 to 20, characterized in that the oscillator (24) with downstream pulse generator (25) for all subsystems (49) is common and that the setting of the flip-flop memory (26a, 26b) for the various 20 half-bridge circuits (1a, 1b) are distributed over as many phase-offset time points as possible in order to minimize the ripple of the output current. 22. 25 inverter according to one of claims 18 to 21, characterized in that the power part (2) on the input side (terminals 33 and 34) a known boost converter circuit (36) with mains rectifier (37) is connected upstream of the current consumption from the supply network (38) is controllable. An inverter according to claim 22, characterized in that the high power boost circuit (36) is formed of a plurality of smaller power partial boost converter circuits (36a, 36b) in parallel. 8 10 • · ♦ ♦ ♦ ······ «• · 24. inverter according to claim 23, characterized in that the sub-boost converter circuits (36a, 36b), a setpoint signal for the desired value (41) of the input current can be supplied, which is identical for all sub-boost converter circuits (36a, 36b) , 25. An inverter according to claim 4, characterized in that the partial boost converter circuits (36a, 36b) are driven out of phase to reduce the ripple of the input current. 20 25 26. Inverter according to one of claims 18 to 25, characterized in that the clock generation system for the power parts (2) and the sub-boost converter circuits (36 a, 36 b) are synchronized with each other and from the common oscillator (24) and the common Pulse generator (25) are derived. 27. Inverter according to one of claims 1 to 26, characterized in that the half-bridge circuits (1a, 1b) comprise four transistors (10a, 10b, 10c, 10d) with a single drive transformer (12) connected to a primary winding (12a) and four separate secondary windings (12b, 12c, 12d, 12e) is provided. 30 28. Inverter according to one of claims 1 to 27, characterized in that the half-bridge circuits (1a, 1b) are constructed with transistors of the MOSFET type. 29. Inverter according to one of claims 18 to 28, characterized in that a power part (2) with superior boost converter circuit (36) forms a mechanical module assembly (44) that several, such module assemblies (44) and that these module assemblies (44 ) are combined by input side (terminals 45 and 46 of the rectifier) and output (terminals 47 and 48 of the output terminals) parallel connection to a power component high overall performance. 30. Inverter according to claim 29, characterized in that each module assembly (44) has its own cooling profile. Vienna, May 7, 2003